According to spec, we should check if output_bpp * pixel_rate is less
than DDI clock * 72, if UHBR is used.
HSDES: 1406899791
BSPEC: 49259
v2: - Removed wrong comment(Rodrigo Vivi)
- Added HSDES to the commit msg(Rodrigo Vivi)
- Moved UHBR check to the MST specific code
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 8b0e4defa3f1..1f1f7f5f6501 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -339,10 +339,19 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
ret = intel_dp_dsc_compute_config(intel_dp, pipe_config,
conn_state, &limits,
pipe_config->dp_m_n.tu, false);
- }
+ if (ret < 0)
+ return ret;
- if (ret)
- return ret;
+ if (intel_dp_is_uhbr(pipe_config)) {
+ int output_bpp = pipe_config->dsc.compressed_bpp;
+
+ if (output_bpp * adjusted_mode->crtc_clock >=
+ pipe_config->port_clock * 72) {
+ drm_dbg_kms(&dev_priv->drm, "DP2 UHBR check failed\n");
+ return -EINVAL;
+ }
+ }
+ }
ret = intel_dp_mst_update_slots(encoder, pipe_config, conn_state);
if (ret)
--
2.37.3
