> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal@xxxxxxxxx>
> Sent: Wednesday, December 14, 2022 12:43 PM
> To: Murthy, Arun R <arun.r.murthy@xxxxxxxxx>; intel-
> gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH] drm/i915/hdmi: Go for scrambling only if
> platform supports TMDS clock > 340MHz
>
>
> On 12/14/2022 9:16 AM, Murthy, Arun R wrote:
> >> -----Original Message-----
> >> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf
> >> Of Ankit Nautiyal
> >> Sent: Tuesday, December 13, 2022 11:21 AM
> >> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> >> Subject: [PATCH] drm/i915/hdmi: Go for scrambling only if
> >> platform supports TMDS clock > 340MHz
> >>
> >> There are cases, where devices have an HDMI1.4 retimer, and TMDS
> >> clock rate is capped to 340MHz via VBT. In such cases scrambling
> >> might be supported by the platform and an HDMI2.0 sink for lower TMDS
> >> rates, but not supported by the retimer, causing blankouts.
> >>
> >> So avoid enabling scrambling, if the TMDS clock is capped to <= 340MHz.
> >>
> > Doesn't this clash with scrambling with low rates?
>
> Hi Arun,
>
> As per HDMI 2.0 spec, scrambling is always required when TMDS char rate >
> 340Mcsc
>
> So scrambling is optional for rate <= 340, if source and sink both support
> scrambling, it is enabled by the source.
>
> Gen 10 onward HDMI 2.0 is supported, the max tmds clock is 594MHz, and
> scrambling is supported.
> But there seem to be cases where for certain platforms that support HDMI
> 2.0, there is an HDMI1.4 retimer chip and the max tmds clock is capped by
> VBT to less than 340MHz.
> In such cases when an HDMI2.0 sink is connected, the driver checks for Gen
> >= 10 + sink scrambling support, and goes with scrambling even for
> resolutions that require lower clocks.
> This creates problem as HDMI1.4 retimer chip doesn't support scrambling.
>
> So in this patch, we replace the check for Gen >=10 with check if max source
> TMDS clock > 340 MHz (taking into account the VBT capping).
>
> In general case for Gen>= 10 (when VBT does not restrict the max tmds
> clock), if sink also supports scrambling for lower rate, driver will go with
> scrambling with lower clocks too.
>
Got it, thanks for the explanation. Better if this is commented in the code as well.
Just to know the restriction coming from VBT.
With adding above comment in code,
Reviewed-by: Arun R Murthy <arun.r.murthy@xxxxxxxxx>
Thanks and Regards,
Arun R Murthy
--------------------
> Thanks & Regards,
>
> Ankit
>
> >
> > Thanks and Regards,
> > Arun R Murthy
> > --------------------
> >> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx>
> >> ---
> >> drivers/gpu/drm/i915/display/intel_hdmi.c | 7 ++++++-
> >> 1 file changed, 6 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> >> b/drivers/gpu/drm/i915/display/intel_hdmi.c
> >> index efa2da080f62..c124fe667bc0 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> >> @@ -2244,6 +2244,11 @@ static bool intel_hdmi_is_cloned(const struct
> >> intel_crtc_state *crtc_state)
> >> !is_power_of_2(crtc_state->uapi.encoder_mask);
> >> }
> >>
> >> +static bool source_can_support_scrambling(struct intel_encoder
> >> +*encoder) {
> >> + return intel_hdmi_source_max_tmds_clock(encoder) > 340000; }
> >> +
> >> int intel_hdmi_compute_config(struct intel_encoder *encoder,
> >> struct intel_crtc_state *pipe_config,
> >> struct drm_connector_state *conn_state) @@ -
> >> 2301,7 +2306,7 @@ int intel_hdmi_compute_config(struct intel_encoder
> >> *encoder,
> >>
> >> pipe_config->lane_count = 4;
> >>
> >> - if (scdc->scrambling.supported && DISPLAY_VER(dev_priv) >= 10) {
> >> + if (scdc->scrambling.supported &&
> >> +source_can_support_scrambling(encoder)) {
> >> if (scdc->scrambling.low_rates)
> >> pipe_config->hdmi_scrambling = true;
> >>
> >> --
> >> 2.25.1
