On Tue, Aug 06, 2013 at 10:24:01PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Refactor the code a bit to split the watermark level validity check into
> a separate function.
>
> Also add hack there that allows us to use it even for LP0 watermarks.
> ATM we don't pre-compute/check the LP0 watermarks, so we just have to
> clamp them to the maximum and hope things work out.
I don't see where we log the unclamped or post-clamped values. This
would be a good opportunity to improve the logging in a common spot.
Comment inline.
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 35 +++++++++++++++++++++++++++++++----
> 1 file changed, 31 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index fe0c2af..f2374e0 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2284,6 +2284,36 @@ static uint32_t ilk_compute_fbc_wm(struct hsw_pipe_wm_parameters *params,
> params->pri_bytes_per_pixel);
> }
>
> +static bool ilk_check_wm(int level,
> + const struct hsw_wm_maximums *max,
> + struct hsw_lp_wm_result *result)
> +{
> + bool ret;
> +
> + result->enable = result->pri_val <= max->pri &&
> + result->spr_val <= max->spr &&
> + result->cur_val <= max->cur;
> +
> + ret = result->enable;
> +
> + /*
> + * HACK until we can pre-compute everything,
> + * and thus fail gracefully if LP0 watermarks
> + * are exceeded...
> + */
> + if (level == 0 && !result->enable) {
> + result->pri_val = min_t(uint32_t, result->pri_val, max->pri);
> + result->spr_val = min_t(uint32_t, result->spr_val, max->spr);
> + result->cur_val = min_t(uint32_t, result->cur_val, max->cur);
> + result->enable = true;
> + ret = false;
ret is already false.
> + }
> +
> + DRM_DEBUG_KMS("WM%d: %sabled\n", level, result->enable ? "en" : "dis");
> +
> + return ret;
> +}
> +
--
Chris Wilson, Intel Open Source Technology Centre
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