On Thu, Nov 17, 2022 at 01:30:14PM -0800, Radhakrishna Sripada wrote: > Register info read from the hardware is being cleared out. Preserve > the register value and use extracted fields in the logic. This description is kind of hard to understand if you don't already know what the problem is (and the context in the diff itself doesn't show enough of the function to make it clear either). You might want to clarify that we were overwriting the 'val' variable that code later in the function still expects to contain the full register value. With a reworded commit message, Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx> > > Fixes: 825477e77912 ("drm/i915/mtl: Obtain SAGV values from MMIO instead of GT pcode mailbox") > Cc: Matt Roper <matthew.d.roper@xxxxxxxxx> > Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_dram.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dram.c b/drivers/gpu/drm/i915/intel_dram.c > index 2403ccd52c74..bba8cb6e8ae4 100644 > --- a/drivers/gpu/drm/i915/intel_dram.c > +++ b/drivers/gpu/drm/i915/intel_dram.c > @@ -471,8 +471,7 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915) > u32 val = intel_uncore_read(&i915->uncore, MTL_MEM_SS_INFO_GLOBAL); > struct dram_info *dram_info = &i915->dram_info; > > - val = REG_FIELD_GET(MTL_DDR_TYPE_MASK, val); > - switch (val) { > + switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) { > case 0: > dram_info->type = INTEL_DRAM_DDR4; > break; > -- > 2.34.1 > -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation