MTL LPDDR5 reported 16b with 8 channels. Previous platforms reported 32b with 4 channels and hence needed a multiplication by a factor of 2. Skip increasing the channels for MTL. v2: Use version check instead of platform check(MattR) Bspec: 64631 Cc: Matt Roper <matthew.d.roper@xxxxxxxxx> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@xxxxxxxxx> --- drivers/gpu/drm/i915/display/intel_bw.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index 4ace026b29bd..1c236f02b380 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.c +++ b/drivers/gpu/drm/i915/display/intel_bw.c @@ -439,7 +439,8 @@ static int tgl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel return ret; } - if (dram_info->type == INTEL_DRAM_LPDDR4 || dram_info->type == INTEL_DRAM_LPDDR5) + if (DISPLAY_VER(dev_priv) < 14 && + (dram_info->type == INTEL_DRAM_LPDDR4 || dram_info->type == INTEL_DRAM_LPDDR5)) num_channels *= 2; qi.deinterleave = qi.deinterleave ? : DIV_ROUND_UP(num_channels, is_y_tile ? 4 : 2); -- 2.34.1
