Engine busyness samples around a 10ms period is failing with busyness ranging approx. from 87% to 115%. The expected range is +/- 5% of the sample period. When determining busyness of active engine, the GuC based engine busyness implementation relies on a 64 bit timestamp register read. The latency incurred by this register read causes the failure. On DG1, when the test fails, the observed latencies range from 900us - 1.5ms. In order to make the selftest more robust and account for such latencies, increase the sample period to 100 ms. v2: (Tvrtko) In addition refactor intel_uncore_read64_2x32 to obtain the forcewake once before reading upper and lower register dwords. Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@xxxxxxxxx> Umesh Nerlige Ramappa (2): i915/uncore: Acquire fw before loop in intel_uncore_read64_2x32 drm/i915/selftest: Bump up sample period for busy stats selftest drivers/gpu/drm/i915/gt/selftest_engine_pm.c | 2 +- drivers/gpu/drm/i915/intel_uncore.h | 44 +++++++++++++------- 2 files changed, 31 insertions(+), 15 deletions(-) -- 2.36.1
