On 31/10/2022 15:56, Ville Syrjala wrote:
From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Correct the ring timestamp frequency for gen4/5, and run the relevant selftests for gen4-6. I've posted at least most of this before, but stuff changed in the meantinme so it needed a rebase. Ville Syrjälä (6): drm/i915: Fix cs timestamp frequency for ctg/elk/ilk drm/i915: Stop claiming cs timestamp frquency on gen2/3 drm/i915: Fix cs timestamp frequency for cl/bw drm/i915/selftests: Run MI_BB perf selftests on SNB drm/i915/selftests: Test RING_TIMESTAMP on gen4/5 drm/i915/selftests: Run the perf MI_BB tests on gen4/5 .../gpu/drm/i915/gt/intel_gt_clock_utils.c | 38 ++++++++++++++++--- drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 22 +++++++++-- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 36 ++++++++---------- 3 files changed, 67 insertions(+), 29 deletions(-)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@xxxxxxxxx>
