> -----Original Message----- > From: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> > Sent: Wednesday, October 26, 2022 12:52 AM > To: Srivatsa, Anusha <anusha.srivatsa@xxxxxxxxx>; intel- > gfx@xxxxxxxxxxxxxxxxxxxxx > Subject: Re: [CI 1/4] drm/i915/display: Change terminology for > cdclk actions > > On Tue, 25 Oct 2022, Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> wrote: > > No functional changes. Changing terminology in some print statements. > > s/has_cdclk_squasher/has_cdclk_squash, > > s/crawler/crawl and s/squasher/squash. > > Any particular reason you re-sent this for CI? You know you can re-run tests > from the patchwork page if the patches remain unchanged? Checkpatch return some errors on the previous series: https://patchwork.freedesktop.org/series/110135/ Had to rectify them and send it again. Anusha > BR, > Jani. > > > > > > Cc: Balasubramani Vivekanandan > <balasubramani.vivekanandan@xxxxxxxxx> > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> > > Reviewed-by: Balasubramani Vivekanandan > > <balasubramani.vivekanandan@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/display/intel_cdclk.c | 16 ++++++++-------- > > 1 file changed, 8 insertions(+), 8 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c > > b/drivers/gpu/drm/i915/display/intel_cdclk.c > > index ad401357ab66..0f5add2fc51b 100644 > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > > @@ -1220,7 +1220,7 @@ static void skl_cdclk_uninit_hw(struct > drm_i915_private *dev_priv) > > skl_set_cdclk(dev_priv, &cdclk_config, INVALID_PIPE); } > > > > -static bool has_cdclk_squasher(struct drm_i915_private *i915) > > +static bool has_cdclk_squash(struct drm_i915_private *i915) > > { > > return IS_DG2(i915); > > } > > @@ -1520,7 +1520,7 @@ static void bxt_get_cdclk(struct drm_i915_private > *dev_priv, > > return; > > } > > > > - if (has_cdclk_squasher(dev_priv)) > > + if (has_cdclk_squash(dev_priv)) > > squash_ctl = intel_de_read(dev_priv, CDCLK_SQUASH_CTL); > > > > if (squash_ctl & CDCLK_SQUASH_ENABLE) { @@ -1747,7 +1747,7 @@ > static > > void bxt_set_cdclk(struct drm_i915_private *dev_priv, > > else > > clock = cdclk; > > > > - if (has_cdclk_squasher(dev_priv)) { > > + if (has_cdclk_squash(dev_priv)) { > > u32 squash_ctl = 0; > > > > if (waveform) > > @@ -1845,7 +1845,7 @@ static void bxt_sanitize_cdclk(struct > drm_i915_private *dev_priv) > > expected = skl_cdclk_decimal(cdclk); > > > > /* Figure out what CD2X divider we should be using for this cdclk */ > > - if (has_cdclk_squasher(dev_priv)) > > + if (has_cdclk_squash(dev_priv)) > > clock = dev_priv->display.cdclk.hw.vco / 2; > > else > > clock = dev_priv->display.cdclk.hw.cdclk; @@ -1976,7 > +1976,7 @@ > > static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv, > > * the moment all platforms with squasher use a fixed cd2x > > * divider. > > */ > > - if (!has_cdclk_squasher(dev_priv)) > > + if (!has_cdclk_squash(dev_priv)) > > return false; > > > > return a->cdclk != b->cdclk && > > @@ -2028,7 +2028,7 @@ static bool intel_cdclk_can_cd2x_update(struct > drm_i915_private *dev_priv, > > * the moment all platforms with squasher use a fixed cd2x > > * divider. > > */ > > - if (has_cdclk_squasher(dev_priv)) > > + if (has_cdclk_squash(dev_priv)) > > return false; > > > > return a->cdclk != b->cdclk && > > @@ -2754,12 +2754,12 @@ int intel_modeset_calc_cdclk(struct > intel_atomic_state *state) > > &old_cdclk_state->actual, > > &new_cdclk_state->actual)) { > > drm_dbg_kms(&dev_priv->drm, > > - "Can change cdclk via squasher\n"); > > + "Can change cdclk via squashing\n"); > > } else if (intel_cdclk_can_crawl(dev_priv, > > &old_cdclk_state->actual, > > &new_cdclk_state->actual)) { > > drm_dbg_kms(&dev_priv->drm, > > - "Can change cdclk via crawl\n"); > > + "Can change cdclk via crawling\n"); > > } else if (pipe != INVALID_PIPE) { > > new_cdclk_state->pipe = pipe; > > -- > Jani Nikula, Intel Open Source Graphics Center
