> -----Original Message-----
> From: Vivekanandan, Balasubramani
> <balasubramani.vivekanandan@xxxxxxxxx>
> Sent: Friday, October 21, 2022 12:08 AM
> To: Srivatsa, Anusha <anusha.srivatsa@xxxxxxxxx>; intel-
> gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Subject: Re: [PATCH 4/4] drm/i915/display: Move squash_ctl register
> programming to its own function
>
> On 20.10.2022 17:20, Anusha Srivatsa wrote:
> > No functional change. Introduce dg2_cdclk_squash_programming and
> move
> > squash_ctl register programming bits to this.
> >
> > Cc: Balasubramani Vivekanandan
> <balasubramani.vivekanandan@xxxxxxxxx>
> > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/display/intel_cdclk.c | 23
> > +++++++++++++---------
> > 1 file changed, 14 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > index 8701796788e3..b692186c8f02 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > @@ -1705,6 +1705,18 @@ static void bxt_cdclk_pll(struct
> > drm_i915_private *i915, int vco)
> >
> > }
> >
> > +static void dg2_cdclk_squash_programming(struct drm_i915_private
> *i915,
> > + u16 waveform)
> > +{
> > + u32 squash_ctl = 0;
> > +
> > + if (waveform)
> > + squash_ctl = CDCLK_SQUASH_ENABLE |
> > + CDCLK_SQUASH_WINDOW_SIZE(0xf) | waveform;
> > +
> > + intel_de_write(i915, CDCLK_SQUASH_CTL, squash_ctl); }
> > +
> > static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
> > const struct intel_cdclk_config *cdclk_config,
> > enum pipe pipe)
> > @@ -1752,15 +1764,8 @@ static void bxt_set_cdclk(struct
> drm_i915_private *dev_priv,
> > else
> > clock = cdclk;
> >
> > - if (HAS_CDCLK_SQUASH(dev_priv)) {
> > - u32 squash_ctl = 0;
> > -
> > - if (waveform)
> > - squash_ctl = CDCLK_SQUASH_ENABLE |
> > - CDCLK_SQUASH_WINDOW_SIZE(0xf) |
> waveform;
> > -
> > - intel_de_write(dev_priv, CDCLK_SQUASH_CTL, squash_ctl);
> > - }
> > + if (HAS_CDCLK_SQUASH(dev_priv))
> > + dg2_cdclk_squash_programming(dev_priv, waveform);
>
> Is it possible to move also the function cdclk_squash_waveform() inside
> dg2_cdclk_squash_programming()?
Hmmm. Are you thinking it is better to have both grabbing the squash waveform and programming the squash_ctl registers in one place better? IMO the fact that they are separate makes it more readable. We will have to return waveform and calculate the clock anyway....
Anusha
> Regards,
> Bala
>
> >
> > val = bxt_cdclk_cd2x_div_sel(dev_priv, clock, vco) |
> > bxt_cdclk_cd2x_pipe(dev_priv, pipe) |
> > --
> > 2.25.1
> >
