On Mon, 10 Oct 2022 11:14:33 -0700, Umesh Nerlige Ramappa wrote: > > From: Lionel Landwerlin <lionel.g.landwerlin@xxxxxxxxx> > > We have an additional register to select which slices contribute to > OAG/OAG counter increments. > > Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@xxxxxxxxx> > Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > drivers/gpu/drm/i915/i915_pci.c | 1 + > drivers/gpu/drm/i915/i915_perf.c | 13 +++++++++++++ > drivers/gpu/drm/i915/intel_device_info.h | 1 + > 4 files changed, 17 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index ccd54ff54002..992ca7b0aea0 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -904,6 +904,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, > > #define HAS_OA_BPC_REPORTING(dev_priv) \ > (INTEL_INFO(dev_priv)->has_oa_bpc_reporting) > +#define HAS_OA_SLICE_CONTRIB_LIMITS(dev_priv) \ > + (INTEL_INFO(dev_priv)->has_oa_slice_contrib_limits) If this is just for XEHPSDV maybe we could just have a platform check rather than introduce a flag? Otherwise this is: Reviewed-by: Ashutosh Dixit <ashutosh.dixit@xxxxxxxxx>
