Restoring the display during a GPU reset is in practice a display
(system) resume sequence, so take the required INIT power for this. So
far this didn't cause a problem as old platforms (where the reset
clobbers display) have only an always-on power well and for new
platforms __intel_display_resume() will take the power domain
internally.
The next patch will add the missing suspending/resuming of encoders
step, which requires the INIT power domain, so for consistency take it
around the whole resume sequence.
Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 8c3bd9ba0d748..8d2cb4904f965 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -943,6 +943,7 @@ void intel_display_finish_reset(struct drm_i915_private *i915)
{
struct drm_modeset_acquire_ctx *ctx = &i915->reset_ctx;
struct drm_atomic_state *state;
+ intel_wakeref_t wakeref;
int ret;
if (!HAS_DISPLAY(i915))
@@ -956,6 +957,8 @@ void intel_display_finish_reset(struct drm_i915_private *i915)
if (!state)
goto unlock;
+ wakeref = intel_display_power_get(i915, POWER_DOMAIN_INIT);
+
/* reset doesn't touch the display */
if (!gpu_reset_clobbers_display(i915)) {
/* for testing only restore the display */
@@ -981,6 +984,8 @@ void intel_display_finish_reset(struct drm_i915_private *i915)
intel_hpd_poll_disable(i915);
}
+ intel_display_power_put(i915, POWER_DOMAIN_INIT, wakeref);
+
drm_atomic_state_put(state);
unlock:
drm_modeset_drop_locks(ctx);
--
2.37.1
