From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
Same thing as "drm/i915: really clear the IIR registers", but on a
separate patch for easier bisecting.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
---
drivers/gpu/drm/i915/i915_irq.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7588ad3..a936c59 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -82,10 +82,14 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */
#define INTEL_IRQ_REG_RESET16(type, do_iir) do { \
I915_WRITE16(type##MR, 0xffff); \
I915_WRITE16(type##ER, 0); \
- if (do_iir) \
- I915_WRITE16(type##IR, I915_READ16(type##IR)); \
- else \
- POSTING_READ16(type##ER); \
+ POSTING_READ16(type##ER); \
+ if (do_iir) { \
+ I915_WRITE16(type##IR, 0xffff); \
+ if (I915_READ16(type##IR)) { \
+ I915_WRITE16(type##IR, 0xffff); \
+ POSTING_READ16(type##IR); \
+ } \
+ } \
} while (0)
#define INTEL_IRQ_REG_RESET(type) do { \
--
1.8.1.2
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