On Thu, Sep 22, 2022 at 11:15:55AM +0300, Luca Coelho wrote:
> On Fri, 2022-09-16 at 19:52 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > Remove the old tales about 90/270 degree rotation
> > effectively preventing FBC. That hasn't been true since
> > we stopped demanding the fence is present in
> > commit 691f7ba58d52 ("drm/i915/display/fbc: Make fences
> > a nice-to-have for GEN9+")
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > ---
>
> Reviewed-by: Luca Coeho <luciano.coelho@xxxxxxxxx>
>
> > drivers/gpu/drm/i915/display/intel_fbc.c | 9 ++-------
> > 1 file changed, 2 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index f38175304928..e97083ea1059 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -1009,7 +1009,8 @@ static bool intel_fbc_is_fence_ok(const struct intel_plane_state *plane_state)
> > {
> > struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> >
> > - /* The use of a CPU fence is one of two ways to detect writes by the
> > + /*
> > + * The use of a CPU fence is one of two ways to detect writes by the
>
> I would have mentioned this side-change in the commit message, but
> that's just due to my extremely nitpicky nature. 😉
Sure. I can amend the commit message a bit. Thanks.
--
Ville Syrjälä
Intel
