Current PSR code is assuming TRANSCODER_EDP == 0. This is not the case
and all fields in PSR_IMR and PSR_IIR are shifted incorrectly if
DISPLAY_VER >= 12.
Fix this by using TRANSCODER_EDP definition instead of 0.
Cc: Mika Kahola <mika.kahola@xxxxxxxxx>
Cc: José Roberto de Souza <jose.souza@xxxxxxxxx>
Signed-off-by: Jouni Högander <jouni.hogander@xxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 9def8d9fade6..9ecf1a9a1120 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -129,7 +129,7 @@ static void psr_irq_control(struct intel_dp *intel_dp)
* 0 shift in bit definition
*/
if (DISPLAY_VER(dev_priv) >= 12) {
- trans_shift = 0;
+ trans_shift = TRANSCODER_EDP;
imr_reg = TRANS_PSR_IMR(intel_dp->psr.transcoder);
} else {
trans_shift = intel_dp->psr.transcoder;
@@ -195,7 +195,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
i915_reg_t imr_reg;
if (DISPLAY_VER(dev_priv) >= 12) {
- trans_shift = 0;
+ trans_shift = TRANSCODER_EDP;
imr_reg = TRANS_PSR_IMR(intel_dp->psr.transcoder);
} else {
trans_shift = intel_dp->psr.transcoder;
@@ -1197,7 +1197,7 @@ static bool psr_interrupt_error_check(struct intel_dp *intel_dp)
if (DISPLAY_VER(dev_priv) >= 12) {
val = intel_de_read(dev_priv,
TRANS_PSR_IIR(intel_dp->psr.transcoder));
- val &= EDP_PSR_ERROR(0);
+ val &= EDP_PSR_ERROR(TRANSCODER_EDP);
} else {
val = intel_de_read(dev_priv, EDP_PSR_IIR);
val &= EDP_PSR_ERROR(intel_dp->psr.transcoder);
--
2.34.1
