On Fri, Sep 16, 2022 at 05:43:58PM -0700, Anusha Srivatsa wrote: > This is a prep series for the actual cdclk refactoring > that will be sent following this. Idea is to have a > struct - cdclk_step that holds the following: > - cdclk action (squash, crawl or modeset) > - cdclk frequency > which gets populated in atomic check. Driver > uses the populated values during atomic commit > to do the suitable sequence of actions like > programming squash ctl registers in case of squashing > or PLL sequence incase of modeset and so on. > > This series just addresses the initial idea. The actual plumming > in the atomic commit phase will be sent shortly. OK, people keep ignoring what I say so I just typed up the code quickly. This to me seems like the most straightforward way to do what we need: https://github.com/vsyrjala/linux.git cdclk_crawl_and_squash Totally untested ofc, apart from me doing a quick scan through our cdclk tables for the crawl+squahs platforms to make sure that this approach should produce sane values. > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Cc: Uma Shankar <uma.shankar@xxxxxxxxx> > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > > Anusha Srivatsa (6): > drm/i915/display Add dg2_prog_squash_ctl() helper > drm/i915/display: add cdclk action struct to cdclk_config > drm/i915/display: Embed the new struct steps for squashing > drm/i915/display: Embed the new struct steps for crawling > drm/i915/display: Embed the new struct steps for modeset > drm/i915/display: Dump the new cdclk config values > > drivers/gpu/drm/i915/display/intel_cdclk.c | 77 +++++++++++++++++----- > drivers/gpu/drm/i915/display/intel_cdclk.h | 16 ++++- > 2 files changed, 74 insertions(+), 19 deletions(-) > > -- > 2.25.1 -- Ville Syrjälä Intel
