Hi Lucas,
On Mon, Sep 12, 2022 at 09:19:38AM -0700, Lucas De Marchi wrote:
> Support for reading the fuses to check what are the Link Copy engines
> was added in commit ad5f74f34201 ("drm/i915/pvc: read fuses for link
> copy engines"). However they were added unconditionally because the
> FUSE3 register is present since graphics version 10.
>
> However the bitfield with meml3 fuses only exists since graphics version
> 12. Moreover, Link Copy engines are currently only available in PVC.
> Tying additional copy engines to the meml3 fuses is not correct for
> other platforms.
>
> Make sure there is a check for `12.60 <= ver < 12.70`. Later platforms
> may extend this function later if it's needed to fuse off copy engines.
>
> Currently it's harmless as the Link Copy engines are still not exported:
> info->engine_mask only has BCS0 set and the register is only read for
> platforms that do have it.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 814f83b5fe59..1f7188129cd1 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -764,6 +764,10 @@ static void engine_mask_apply_copy_fuses(struct intel_gt *gt)
> unsigned long meml3_mask;
> unsigned long quad;
>
> + if (!(GRAPHICS_VER_FULL(i915) >= IP_VER(12, 60) &&
> + GRAPHICS_VER_FULL(i915) < IP_VER(12, 70)))
> + return;
> +
Isn't it easier if you wrote
if (GRAPHICS_VER_FULL(i915) < IP_VER(12, 60) ||
GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
return;
?
You save a parenthesis and a negation '!'.
Anyway, looks good:
Reviewed-by: Andi Shyti <andi.shyti@xxxxxxxxxxxxxxx>
Andi
> meml3_mask = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
> meml3_mask = REG_FIELD_GET(GEN12_MEML3_EN_MASK, meml3_mask);
>
>
> --
> b4 0.10.0-dev-df873
