As per PCIe Spec Section 5.3.1.4.1 When pcie function is in d3hot state, Configuration and Message requests are the only TLPs accepted by a Function in the D3hot state. All other received Requests must be handled as Unsupported Requests, and all received Completions may optionally be handled as Unexpected Completions. Therefore when gfx endpoint function is in d3 state, all pcie iomem transaction requires to transition the pcie function in D0 state. Implementation of handling i915_gem_object_pin_map will be handled in different series. Anshuman Gupta (2): drm/i915: Refactor userfault_wakeref to re-use drm/i915/dgfx: Release mmap on rpm suspend drivers/gpu/drm/i915/gem/i915_gem_mman.c | 23 ++++++++- drivers/gpu/drm/i915/gem/i915_gem_mman.h | 1 + drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 +- .../gpu/drm/i915/gem/i915_gem_object_types.h | 3 +- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 47 ++++++++++++++++--- drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 1 - drivers/gpu/drm/i915/gt/intel_gt.c | 3 ++ drivers/gpu/drm/i915/gt/intel_gt_types.h | 17 +++++++ drivers/gpu/drm/i915/gt/intel_gtt.h | 3 -- drivers/gpu/drm/i915/i915_driver.c | 1 - drivers/gpu/drm/i915/i915_gem.c | 7 ++- 12 files changed, 94 insertions(+), 16 deletions(-) -- 2.26.2
