Apart from checking if crawling can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.
v2: Move crawling steps to a switch case (anusha)
Cc: Matt Roper <matthew.d.roper@xxxxxxxxx>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 45 +++++++++++++---------
1 file changed, 26 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index f98fd48fe905..7bba10635c5e 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -38,6 +38,7 @@
#include "intel_psr.h"
#include "vlv_sideband.h"
+#define ADLP_CDCLK_CRAWL(dev_priv, vco) (HAS_CDCLK_CRAWL(dev_priv) && dev_priv->cdclk.hw.vco > 0 && vco > 0)
/**
* DOC: CDCLK / RAWCLK
*
@@ -1727,10 +1728,7 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
return;
}
- if (HAS_CDCLK_CRAWL(dev_priv) && dev_priv->cdclk.hw.vco > 0 && vco > 0) {
- if (dev_priv->cdclk.hw.vco != vco)
- adlp_cdclk_pll_crawl(dev_priv, vco);
- } else if (DISPLAY_VER(dev_priv) >= 11) {
+ if (!ADLP_CDCLK_CRAWL(dev_priv, vco) && DISPLAY_VER(dev_priv) >= 11) {
if (dev_priv->cdclk.hw.vco != 0 &&
dev_priv->cdclk.hw.vco != vco)
icl_cdclk_pll_disable(dev_priv);
@@ -1748,18 +1746,21 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
waveform = cdclk_squash_waveform(dev_priv, cdclk);
- if (waveform && has_cdclk_squasher(dev_priv)) {
- clock = vco / 2;
+ if ((waveform && has_cdclk_squasher(dev_priv)) || ADLP_CDCLK_CRAWL(dev_priv, vco)) {
for (i = 0; i < MAX_CDCLK_ACTIONS; i++) {
switch (cdclk_steps[i].action) {
+ case INTEL_CDCLK_CRAWL:
+ adlp_cdclk_pll_crawl(dev_priv, vco);
+ clock = cdclk;
+ break;
case INTEL_CDCLK_SQUASH:
waveform = cdclk_squash_waveform(dev_priv, cdclk_steps[i].cdclk);
squash_ctl = CDCLK_SQUASH_ENABLE |
CDCLK_SQUASH_WINDOW_SIZE(0xf) | waveform;
intel_de_write(dev_priv, CDCLK_SQUASH_CTL, squash_ctl);
+ clock = vco / 2;
break;
case INTEL_CDCLK_NOOP:
- case INTEL_CDCLK_CRAWL:
case INTEL_CDCLK_MODESET:
break;
default:
@@ -1956,10 +1957,11 @@ void intel_cdclk_uninit_hw(struct drm_i915_private *i915)
skl_cdclk_uninit_hw(i915);
}
-static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
- const struct intel_cdclk_config *a,
- const struct intel_cdclk_config *b)
+static bool intel_cdclk_crawl(struct drm_i915_private *dev_priv,
+ const struct intel_cdclk_state *a,
+ struct intel_cdclk_state *b)
{
+ struct cdclk_step *cdclk_transition = b->steps;
int a_div, b_div;
if (!HAS_CDCLK_CRAWL(dev_priv))
@@ -1969,13 +1971,18 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
* The vco and cd2x divider will change independently
* from each, so we disallow cd2x change when crawling.
*/
- a_div = DIV_ROUND_CLOSEST(a->vco, a->cdclk);
- b_div = DIV_ROUND_CLOSEST(b->vco, b->cdclk);
+ a_div = DIV_ROUND_CLOSEST(a->actual.vco, a->actual.cdclk);
+ b_div = DIV_ROUND_CLOSEST(b->actual.vco, b->actual.cdclk);
- return a->vco != 0 && b->vco != 0 &&
- a->vco != b->vco &&
- a_div == b_div &&
- a->ref == b->ref;
+ cdclk_transition[0].action = INTEL_CDCLK_CRAWL;
+ cdclk_transition[0].cdclk = b->actual.cdclk;
+ cdclk_transition[1].action = INTEL_CDCLK_NOOP;
+ cdclk_transition[1].cdclk = b->actual.cdclk;
+
+ return a->actual.vco != 0 && b->actual.vco != 0 &&
+ a->actual.vco != b->actual.vco &&
+ a_div == b_div &&
+ a->actual.ref == b->actual.ref;
}
static bool intel_cdclk_squash(struct drm_i915_private *dev_priv,
@@ -2781,9 +2788,9 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
new_cdclk_state)) {
drm_dbg_kms(&dev_priv->drm,
"Can change cdclk via squasher\n");
- } else if (intel_cdclk_can_crawl(dev_priv,
- &old_cdclk_state->actual,
- &new_cdclk_state->actual)) {
+ } else if (intel_cdclk_crawl(dev_priv,
+ old_cdclk_state,
+ new_cdclk_state)) {
drm_dbg_kms(&dev_priv->drm,
"Can change cdclk via crawl\n");
} else if (pipe != INVALID_PIPE) {
--
2.25.1
