On Thu, Jul 21, 2022 at 03:29:51PM +0530, tilak.tangudu@xxxxxxxxx wrote:
> From: Tilak Tangudu <tilak.tangudu@xxxxxxxxx>
>
> During runtime resume the display init sequence is called via
> intel_display_power_resume() -> icl_display_core_init()
> which should restore the display HW state. For restoring the DC9 enabled
> state in DC_STATE_EN, gen9_sanitize_dc_state() should be called on the
> runtime resume path too to avoid the
>
> [ 513.818190] i915 0000:03:00.0: [drm] *ERROR DC state mismatch (0x8 -> 0x0)*
>
> Signed-off-by: Tilak Tangudu <tilak.tangudu@xxxxxxxxx>
Cc: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx>
Cc: Imre Deak <imre.deak@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_display_power.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 589af257edeb..799f84d3eed6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -2229,6 +2229,7 @@ void intel_display_power_suspend(struct drm_i915_private *i915)
> void intel_display_power_resume(struct drm_i915_private *i915)
> {
> if (DISPLAY_VER(i915) >= 11) {
> + gen9_sanitize_dc_state(i915);
> bxt_disable_dc9(i915);
> icl_display_core_init(i915, true);
> if (intel_dmc_has_payload(i915)) {
> --
> 2.25.1
>
