On Tue, 26 Jul 2022, Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx> wrote: > The low voltage sku check can be ignored as OEMs need to consider that > when designing the board and then put any limits in VBT. > > Due to this check many DP sink that can be run with higher link rate, > are run at lower link rate, thereby pruning the resolutions that are > intended to be working as per bspec. > > However, some eDP panels are getting issues [1] with higher link rate. > So keep the low voltage check for eDP, but ignore for DP sinks. What's the root cause? This seems like guess work. BR, Jani. > [1] https://gitlab.freedesktop.org/drm/intel/-/issues/6205 > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5272 > > v2: Added comment about eDP HBR2 restriction for JSL/EHL (Arun). > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx> > Reviewed-by: Arun R Murthy <arun.r.murthy@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 32292c0be2bd..e50bba14e8c5 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -405,7 +405,8 @@ static int icl_max_source_rate(struct intel_dp *intel_dp) > enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port); > > if (intel_phy_is_combo(dev_priv, phy) && > - (is_low_voltage_sku(dev_priv, phy) || !intel_dp_is_edp(intel_dp))) > + intel_dp_is_edp(intel_dp) && > + is_low_voltage_sku(dev_priv, phy)) > return 540000; > > return 810000; > @@ -413,11 +414,8 @@ static int icl_max_source_rate(struct intel_dp *intel_dp) > > static int ehl_max_source_rate(struct intel_dp *intel_dp) > { > - struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > - struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); > - enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port); > - > - if (intel_dp_is_edp(intel_dp) || is_low_voltage_sku(dev_priv, phy)) > + /* For JSL/EHL, eDP supports only HBR2 5.4 (SOC PHY restriction) */ > + if (intel_dp_is_edp(intel_dp)) > return 540000; > > return 810000; > @@ -429,7 +427,9 @@ static int dg1_max_source_rate(struct intel_dp *intel_dp) > struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); > enum phy phy = intel_port_to_phy(i915, dig_port->base.port); > > - if (intel_phy_is_combo(i915, phy) && is_low_voltage_sku(i915, phy)) > + if (intel_phy_is_combo(i915, phy) && > + intel_dp_is_edp(intel_dp) && > + is_low_voltage_sku(i915, phy)) > return 540000; > > return 810000; -- Jani Nikula, Intel Open Source Graphics Center
