On Wed, Jul 27, 2022 at 06:34:17PM -0700, Radhakrishna Sripada wrote:
> From: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@xxxxxxxxx>
>
> Adding support to load DMC v2.08 on MTL.
>
> Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_dmc.c | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> index fa9ef591b885..9c4f442fa407 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -52,6 +52,11 @@
>
> #define DISPLAY_VER12_DMC_MAX_FW_SIZE ICL_DMC_MAX_FW_SIZE
>
> +#define MTL_DMC_PATH DMC_PATH(mtl, 2, 08)
> +#define MTL_DMC_VERSION_REQUIRED DMC_VERSION(2, 8)
> +#define MTL_DMC_MAX_FW_SIZE 0x10000
Is it correct that Xe_LPD+ has a smaller payload than Xe_LPD platforms?
Actually, looking closer I'm wondering if the
DISPLAY_VER13_DMC_MAX_FW_SIZE we were using on Xe_LPD was correct. I
think the value here is supposed to be a per-payload maximum (i.e.,
checked separately for the main DMC and the pipe DMC), right? And the
MMIO ranges the payloads can be loaded into both appear to be sized
0x10000, so it's not clear to me whether we needed the 0x20000 value on
ADL-P and DG2.
Matt
> +MODULE_FIRMWARE(MTL_DMC_PATH);
> +
> #define DG2_DMC_PATH DMC_PATH(dg2, 2, 06)
> #define DG2_DMC_VERSION_REQUIRED DMC_VERSION(2, 06)
> MODULE_FIRMWARE(DG2_DMC_PATH);
> @@ -827,7 +832,11 @@ void intel_dmc_ucode_init(struct drm_i915_private *dev_priv)
> */
> intel_dmc_runtime_pm_get(dev_priv);
>
> - if (IS_DG2(dev_priv)) {
> + if (IS_METEORLAKE(dev_priv)) {
> + dmc->fw_path = MTL_DMC_PATH;
> + dmc->required_version = MTL_DMC_VERSION_REQUIRED;
> + dmc->max_fw_size = MTL_DMC_MAX_FW_SIZE;
> + } else if (IS_DG2(dev_priv)) {
> dmc->fw_path = DG2_DMC_PATH;
> dmc->required_version = DG2_DMC_VERSION_REQUIRED;
> dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
> --
> 2.25.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
