On Wed, Jul 27, 2022 at 06:33:57PM -0700, Radhakrishna Sripada wrote: > The PCI Id's and platform definition are posted earlier. > This series adds handful of early enablement patches including > support for display power wells, VBT and AUX Channel mapping, > PCH and gmbus support, dbus, mbus, sagv and memory bandwidth support. > > This series also add the support for a new way to read Graphics, > Media and Display versions. One general note on the series --- most of the patches that weren't authored by you appear to be missing your s-o-b line. Make sure you add that when you resend and/or push the patches. Matt > > Anusha Srivatsa (2): > drm/i915/mtl: Add CDCLK Support > drm/i915/dmc: MTL DMC debugfs entries > > Clint Taylor (1): > drm/i915/mtl: Fix rawclk for Meteorlake PCH > > Imre Deak (3): > drm/i915/mtl: Add VBT port and AUX_CH mapping > drm/i915/mtl: Add display power wells > drm/i915/mtl: Add DP AUX support on TypeC ports > > José Roberto de Souza (2): > drm/i915: Parse and set stepping for platforms with GMD > drm/i915/display/mtl: Extend MBUS programming > > Madhumitha Tolakanahalli Pradeep (2): > drm/i915/dmc: Load DMC on MTL > drm/i915/mtl: Update CHICKEN_TRANS* register addresses > > Matt Roper (4): > drm/i915: Read graphics/media/display arch version from hw > drm/i915/mtl: MMIO range is now 4MB > drm/i915/mtl: Don't mask off CCS according to DSS fusing > drm/i915/mtl: Define engine context layouts > > Radhakrishna Sripada (9): > drm/i915/mtl: Add PCH support > drm/i915/mtl: Add gmbus and gpio support > drm/i915/mtl: Add support for MTL in Display Init sequences > drm/i915/mtl: memory latency data from LATENCY_LPX_LPY for WM > drm/i915/mtl: Obtain SAGV values from MMIO instead of GT pcode mailbox > drm/i915/mtl: Update memory bandwidth parameters > drm/i915/mtl: Update MBUS_DBOX credits > drm/i915/mtl: DBUF handling is same as adlp > drm/i915/mtl: Do not update GV point, mask value > > drivers/gpu/drm/i915/display/intel_bios.c | 14 +- > drivers/gpu/drm/i915/display/intel_bw.c | 87 ++++- > drivers/gpu/drm/i915/display/intel_bw.h | 9 + > drivers/gpu/drm/i915/display/intel_cdclk.c | 351 ++++++++++++++++-- > drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- > drivers/gpu/drm/i915/display/intel_display.c | 7 +- > .../drm/i915/display/intel_display_power.c | 5 +- > .../i915/display/intel_display_power_map.c | 115 +++++- > .../i915/display/intel_display_power_well.c | 43 +++ > .../i915/display/intel_display_power_well.h | 4 + > drivers/gpu/drm/i915/display/intel_dmc.c | 19 +- > drivers/gpu/drm/i915/display/intel_dp_aux.c | 53 ++- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- > drivers/gpu/drm/i915/display/intel_gmbus.c | 17 + > drivers/gpu/drm/i915/display/intel_gmbus.h | 1 + > drivers/gpu/drm/i915/display/intel_psr.c | 6 +- > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- > drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 + > drivers/gpu/drm/i915/gt/intel_lrc.c | 47 ++- > drivers/gpu/drm/i915/i915_driver.c | 85 ++++- > drivers/gpu/drm/i915/i915_drv.h | 18 +- > drivers/gpu/drm/i915/i915_pci.c | 1 + > drivers/gpu/drm/i915/i915_reg.h | 91 ++++- > drivers/gpu/drm/i915/intel_device_info.c | 32 +- > drivers/gpu/drm/i915/intel_device_info.h | 14 + > drivers/gpu/drm/i915/intel_dram.c | 41 +- > drivers/gpu/drm/i915/intel_pch.c | 9 +- > drivers/gpu/drm/i915/intel_pch.h | 4 + > drivers/gpu/drm/i915/intel_pm.c | 180 ++++++--- > drivers/gpu/drm/i915/intel_step.c | 60 +++ > drivers/gpu/drm/i915/intel_uncore.c | 11 +- > .../gpu/drm/i915/selftests/mock_gem_device.c | 1 + > 32 files changed, 1178 insertions(+), 155 deletions(-) > > -- > 2.25.1 > -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation
