On Thu, 2022-07-28 at 09:26 -0700, Anusha Srivatsa wrote: > With the latest DMC in place, enabling DC5 on DG2. > > Cc: Imre Deak <imre.deak@xxxxxxxxx> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> Reviewed-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_display_power.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c > b/drivers/gpu/drm/i915/display/intel_display_power.c > index 13aaa3247a5a..3f84af6beff3 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > @@ -908,7 +908,7 @@ static u32 get_allowed_dc_mask(const struct > drm_i915_private *dev_priv, > return 0; > > if (IS_DG2(dev_priv)) > - max_dc = 0; > + max_dc = 1; > else if (IS_DG1(dev_priv)) > max_dc = 3; > else if (DISPLAY_VER(dev_priv) >= 12)