On 15/06/2022 06:43, priyanka.dandamudi@xxxxxxxxx wrote:
From: Priyanka Dandamudi <priyanka.dandamudi@xxxxxxxxx>
lmem_bar_size is used to resize lmem bar.
It sets to only one of the supported sizes.
Setting this param will be in MB unit.
Maybe add some more information here for why we want to add this?
Something like:
"For testing purposes, support forcing the lmem_bar size through a new
modparam. In CI we only have a limited number of configurations for DG2,
but we still need to be reasonably sure we get a usable device (also
verifying we report the correct values for things like
probed_cpu_visible_size etc) with all the potential lmem_bar sizes that
we might expect see in the wild."
?
Cc: Matthew Auld <matthew.auld@xxxxxxxxx>
Signed-off-by: Priyanka Dandamudi <priyanka.dandamudi@xxxxxxxxx>
---
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 3 +++
drivers/gpu/drm/i915/i915_driver.c | 25 ++++++++++++++++++++-
drivers/gpu/drm/i915/i915_params.c | 2 ++
drivers/gpu/drm/i915/i915_params.h | 1 +
4 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index 119e53f5d9b1..d73d8b2adfa2 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -132,6 +132,9 @@ static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
mul_u32_u32(i915->params.lmem_size, SZ_1M));
}
+ if (i915->params.lmem_bar_size > 0)
+ lmem_size = pci_resource_len(pdev, 2);
This is just a temporary hack until we have all the small-bar stuff
landed, right? If so, maybe annotate with:
/* XXX: remove once we land small-bar uapi bits */
So we don't forget to remove this.
+
io_start = pci_resource_start(pdev, 2);
io_size = min(pci_resource_len(pdev, 2), lmem_size);
if (!io_size)
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 8d33a6a31675..2f5d7a1f1a7b 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -371,7 +371,30 @@ static void i915_resize_lmem_bar(struct drm_i915_private *i915)
u32 pci_cmd;
int i;
- if (!rebar_size)
+ if (i915->params.lmem_bar_size > 0) {
+ u32 lmem_bar_size;
+ u32 set_bit;
+ u32 rebar;
+ u32 msb;
+ int k;
+
+ lmem_bar_size = i915->params.lmem_bar_size;
+ rebar = pci_rebar_get_possible_sizes(pdev, LMEM_BAR_NUM);
+ msb = __fls(rebar);
+
+ for (k = msb; k >= 0; k--) {
+ set_bit = (1 << k);
+
+ if (set_bit & rebar)
+ if (set_bit == lmem_bar_size) {
+ rebar_size = 1ULL << (__fls(lmem_bar_size) + BAR_SIZE_SHIFT);
+
+ if (rebar_size == pci_resource_len(pdev, LMEM_BAR_NUM))
+ return;
+ break;
+ }
+ }
+ } else if (!rebar_size)
return;
/* Find out if root bus contains 64bit memory addressing */
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 701fbc98afa0..6fc475a5db61 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -204,6 +204,8 @@ i915_param_named_unsafe(request_timeout_ms, uint, 0600,
i915_param_named_unsafe(lmem_size, uint, 0400,
"Set the lmem size(in MiB) for each region. (default: 0, all memory)");
+i915_param_named_unsafe(lmem_bar_size, uint, 0400,
+ "Set the lmem bar size(in MiB).");
static __always_inline void _print_param(struct drm_printer *p,
const char *name,
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index b5e7ea45d191..2733cb6cfe09 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -74,6 +74,7 @@ struct drm_printer;
param(char *, force_probe, CONFIG_DRM_I915_FORCE_PROBE, 0400) \
param(unsigned int, request_timeout_ms, CONFIG_DRM_I915_REQUEST_TIMEOUT, CONFIG_DRM_I915_REQUEST_TIMEOUT ? 0600 : 0) \
param(unsigned int, lmem_size, 0, 0400) \
+ param(unsigned int, lmem_bar_size, 0, 0400) \
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
param(bool, load_detect_test, false, 0600) \
