Re: [PATCH 2/2] drm/i915/uc: Fix undefined behavior due to shift overflowing the constant

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On Wed, 18 May 2022, Jani Nikula <jani.nikula@xxxxxxxxx> wrote:
> On Wed, 18 May 2022, Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx> wrote:
>> On 18.05.2022 13:33, Jani Nikula wrote:
>>> From: Borislav Petkov <bp@xxxxxxx>
>>> 
>>> Fix:
>>> 
>>>   In file included from <command-line>:0:0:
>>>   drivers/gpu/drm/i915/gt/uc/intel_guc.c: In function ‘intel_guc_send_mmio’:
>>>   ././include/linux/compiler_types.h:352:38: error: call to ‘__compiletime_assert_1047’ \
>>>   declared with attribute error: FIELD_PREP: mask is not constant
>>>     _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
>>> 
>>> and other build errors due to shift overflowing values.
>>> 
>>> See https://lore.kernel.org/r/YkwQ6%2BtIH8GQpuct@xxxxxxx for the gory
>>> details as to why it triggers with older gccs only.
>>> 
>>> v2 by Jani:
>>> - Drop the i915_reg.h changes
>>> 
>>> Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx>
>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxxxxxxxx>
>>> Cc: Ruiqi GONG <gongruiqi1@xxxxxxxxxx>
>>> Cc: Randy Dunlap <rdunlap@xxxxxxxxxxxxx>
>>> Signed-off-by: Borislav Petkov <bp@xxxxxxx>
>>> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
>>> ---
>>>  drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h           | 2 +-
>>>  drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h | 2 +-
>>>  drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h          | 2 +-
>>>  drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h                 | 2 +-
>>>  4 files changed, 4 insertions(+), 4 deletions(-)
>>> 
>>> diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
>>> index be9ac47fa9d0..4ef9990ed7f8 100644
>>> --- a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
>>> +++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
>>> @@ -50,7 +50,7 @@
>>>  
>>>  #define HOST2GUC_SELF_CFG_REQUEST_MSG_LEN		(GUC_HXG_REQUEST_MSG_MIN_LEN + 3u)
>>>  #define HOST2GUC_SELF_CFG_REQUEST_MSG_0_MBZ		GUC_HXG_REQUEST_MSG_0_DATA0
>>> -#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_KEY		(0xffff << 16)
>>> +#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_KEY		(0xffffU << 16)
>>
>> nit: maybe for consistency we should update all these hex constants to
>> be explicitly marked as "unsigned" (as that was the intention) and also
>> maybe we should use lowercase "u" - but both that can be done later,
>
> For the guc reg stuff we should probably use REG_GENMASK() and
> REG_FIELD_PREP() instead, like I did for i915_reg.h. I just don't know
> about the plethora of other uc headers though...
>
>> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx>
>
> Thanks,
> Jani.

And pushed to drm-intel-gt-next.

BR,
Jani.

>
>>
>>>  #define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_LEN		(0xffff << 0)
>>>  #define HOST2GUC_SELF_CFG_REQUEST_MSG_2_VALUE32		GUC_HXG_REQUEST_MSG_n_DATAn
>>>  #define HOST2GUC_SELF_CFG_REQUEST_MSG_3_VALUE64		GUC_HXG_REQUEST_MSG_n_DATAn
>>> diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h
>>> index c9086a600bce..df83c1cc7c7a 100644
>>> --- a/drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h
>>> +++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h
>>> @@ -82,7 +82,7 @@ static_assert(sizeof(struct guc_ct_buffer_desc) == 64);
>>>  #define GUC_CTB_HDR_LEN				1u
>>>  #define GUC_CTB_MSG_MIN_LEN			GUC_CTB_HDR_LEN
>>>  #define GUC_CTB_MSG_MAX_LEN			256u
>>> -#define GUC_CTB_MSG_0_FENCE			(0xffff << 16)
>>> +#define GUC_CTB_MSG_0_FENCE			(0xffffU << 16)
>>>  #define GUC_CTB_MSG_0_FORMAT			(0xf << 12)
>>>  #define   GUC_CTB_FORMAT_HXG			0u
>>>  #define GUC_CTB_MSG_0_RESERVED			(0xf << 8)
>>> diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h
>>> index 29ac823acd4c..7d5ba4d97d70 100644
>>> --- a/drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h
>>> +++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h
>>> @@ -40,7 +40,7 @@
>>>   */
>>>  
>>>  #define GUC_HXG_MSG_MIN_LEN			1u
>>> -#define GUC_HXG_MSG_0_ORIGIN			(0x1 << 31)
>>> +#define GUC_HXG_MSG_0_ORIGIN			(0x1U << 31)
>>>  #define   GUC_HXG_ORIGIN_HOST			0u
>>>  #define   GUC_HXG_ORIGIN_GUC			1u
>>>  #define GUC_HXG_MSG_0_TYPE			(0x7 << 28)
>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
>>> index 2516705b9f36..8dc063f087eb 100644
>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
>>> @@ -28,7 +28,7 @@
>>>  #define   GS_MIA_HALT_REQUESTED		  (0x02 << GS_MIA_SHIFT)
>>>  #define   GS_MIA_ISR_ENTRY		  (0x04 << GS_MIA_SHIFT)
>>>  #define   GS_AUTH_STATUS_SHIFT		30
>>> -#define   GS_AUTH_STATUS_MASK		  (0x03 << GS_AUTH_STATUS_SHIFT)
>>> +#define   GS_AUTH_STATUS_MASK		  (0x03U << GS_AUTH_STATUS_SHIFT)
>>>  #define   GS_AUTH_STATUS_BAD		  (0x01 << GS_AUTH_STATUS_SHIFT)
>>>  #define   GS_AUTH_STATUS_GOOD		  (0x02 << GS_AUTH_STATUS_SHIFT)
>>>  

-- 
Jani Nikula, Intel Open Source Graphics Center




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