== Series Details == Series: DG2 VRAM_SR Support (rev2) URL : https://patchwork.freedesktop.org/series/104128/ State : warning == Summary == Error: dim checkpatch failed ee8880156960 drm/i915/dgfx: OpRegion VRAM Self Refresh Support 41f57c1513eb drm/i915/dg1: OpRegion PCON DG1 MBD config support b20625f7bd5e drm/i915/dg2: DG2 MBD config -:40: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects? #40: FILE: drivers/gpu/drm/i915/i915_drv.h:1081: +#define IS_DG2_MBD(dev_priv) (IS_DG2(dev_priv) && \ + (INTEL_DEVID(dev_priv) & DG2_MBD_CONFIG_MASK) == DG2_MBD_CONFIG_VAL) total: 0 errors, 0 warnings, 1 checks, 23 lines checked 0bcbc42282e2 drm/i915/dgfx: Add has_lmem_sr b9322552deed drm/i915/pcode: DGFX PCODE MBOX headers 18499773956c drm/i915/dgfx: Setup VRAM SR with D3COLD -:96: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #96: FILE: drivers/gpu/drm/i915/intel_pcode.c:247: + REG_FIELD_PREP(GEN6_PCODE_MB_COMMAND, + DG1_PCODE_D3_VRAM_SR) | -:98: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #98: FILE: drivers/gpu/drm/i915/intel_pcode.c:249: + REG_FIELD_PREP(GEN6_PCODE_MB_PARAM1, + DG1_ENABLE_SR), 0); /* no data needed for this cmd */ total: 0 errors, 0 warnings, 2 checks, 127 lines checked f4732fb4b295 drm/i915/rpm: Enable D3Cold VRAM SR Support
