Re: [PATCH] i915: Add first set of DG2 PCI IDs

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On Fri, Apr 22, 2022 at 09:55:35AM -0700, Matt Roper wrote:
The IDs added here are the subset reserved for 'motherboard down'
designs of DG2.  We have all the necessary support upstream to enable
these now (although they'll continue to require force_probe until the
usual requirements are met).

Main requirement for keeping the PCI IDs out was the needed uapi
changes. Did they all land already? If so can we mention that explicitly
in the commit message?



The remaining DG2 IDs for add-in cards will come in a future patch once
some additional required functionality has fully landed.

Bspec: 44477
Cc: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>
Cc: Daniel Vetter <daniel@xxxxxxxx>
Cc: Dave Airlie <airlied@xxxxxxxxx>
Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx>
Cc: Jani Nikula <jani.nikula@xxxxxxxxx>
Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxxxxxxxx>
Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
---

These IDs already exist in drm-tip via the topic/core-for-CI branch, so
I've based this patch on drm-intel-next (where we intend to land it)
instead of drm-tip.


but they are not the same. Maybe having 2 patches on drm-tip with a
revert + this patch would be better, so this can also have a chance to
go through CI.

Lucas De Marchi



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