✓ Fi.CI.BAT: success for drm/i915: Refactor the display power domain mappings (rev3)

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Title: Project List - Patchwork
Patch Details
Series:drm/i915: Refactor the display power domain mappings (rev3)
URL:https://patchwork.freedesktop.org/series/99476/
State:success
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22722/index.html

CI Bug Log - changes from CI_DRM_11416 -> Patchwork_22722

Summary

SUCCESS

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22722/index.html

Participating hosts (44 -> 51)

Additional (9): fi-cml-u2 fi-tgl-u2 fi-skl-guc bat-adlm-1 fi-icl-u2 fi-cfl-8700k bat-adlp-4 fi-ivb-3770 fi-pnv-d510
Missing (2): fi-bsw-cyan fi-bdw-samus

Possible new issues

Here are the unknown changes that may have been introduced in Patchwork_22722:

IGT changes

Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

Known issues

Here are the changes found in Patchwork_22722 that come from known issues:

IGT changes

Issues hit

Possible fixes

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Build changes

CI-20190529: 20190529
CI_DRM_11416: 1dc2c6953e2689a0e5b7cca8450da14059d35f03 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6399: 9ba6cb16f04319226383b57975db203561c75781 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22722: f504bb328a7ab0d8de86b7d4a2957a2489b85115 @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

f504bb328a7a drm/i915: Remove the XELPD specific AUX and DDI power domains
53e740d2f452 drm/i915: Remove duplicate DDI/AUX power domain mappings
70425109390c drm/i915: Remove the ICL specific TBT power domains
3520d9c5072e drm/i915: Remove the aliasing of power domain enum values
ebbce4a52f99 drm/i915: Sanitize the port -> DDI/AUX power domain mapping for each platform
1d5ca6d6fd4a drm/i915: Sanitize the ADL-S power well definition
cf5d7ea94dbd drm/i915: Simplify the DG1 power well descriptors
d264fce0b3ef drm/i915: Allow platforms to share power well descriptors
f68ac7ab1852 drm/i915: Simplify power well definitions by adding power well instances
fcd6ff9811c3 drm/i915: Convert the u64 power well domains mask to a bitmap
3e90e324a279 drm/i915: Convert the power well descriptor domain mask to an array of domains
1d3d8dac9778 drm/i915: Sanitize the power well names
e809f351fa66 drm/i915: Rename the power domain names to end with pipes/ports
e6a10f0958d4 drm/i915: Move the HSW power well flags to a common bitfield
4eeff3ba0f24 drm/i915: Move the dg2 fixed_enable_delay power well param to a common bitfield
e45b48445238 drm/i915: Move the power domain->well mappings to intel_display_power_map.c
86cb72f00160 drm/i915: Unexport the for_each_power_well() macros
b760be68ea17 drm/i915: Move per-platform power well hooks to intel_display_power_well.c


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