== Series Details == Series: series starting with [CI,v3,1/3] drm/i915/display/tgl+: Set default values for all registers in PIPE_MBUS_DBOX_CTL URL : https://patchwork.freedesktop.org/series/101965/ State : warning == Summary == $ dim checkpatch origin/drm-tip a389720ee911 drm/i915/display/tgl+: Set default values for all registers in PIPE_MBUS_DBOX_CTL -:75: WARNING:LONG_LINE: line length of 102 exceeds 100 columns #75: FILE: drivers/gpu/drm/i915/i915_reg.h:1111: +#define MBUS_DBOX_B2B_TRANSACTIONS_MAX(x) REG_FIELD_PREP(MBUS_DBOX_B2B_TRANSACTIONS_MAX_MASK, x) -:77: WARNING:LONG_LINE: line length of 104 exceeds 100 columns #77: FILE: drivers/gpu/drm/i915/i915_reg.h:1113: +#define MBUS_DBOX_B2B_TRANSACTIONS_DELAY(x) REG_FIELD_PREP(MBUS_DBOX_B2B_TRANSACTIONS_DELAY_MASK, x) total: 0 errors, 2 warnings, 0 checks, 54 lines checked e4e4875b4baa drm/i915/display/adlp: Adjust MBUS DBOX BW and B credits e8e1a9e4d521 drm/i915/display/adlp: Fix programing of PIPE_MBUS_DBOX_CTL
