== Series Details == Series: series starting with [v4,1/4] drm/i915/display/tgl+: Set default values for all registers in PIPE_MBUS_DBOX_CTL URL : https://patchwork.freedesktop.org/series/101937/ State : warning == Summary == $ dim checkpatch origin/drm-tip 736622c4b868 drm/i915/display/tgl+: Set default values for all registers in PIPE_MBUS_DBOX_CTL -:74: WARNING:LONG_LINE: line length of 102 exceeds 100 columns #74: FILE: drivers/gpu/drm/i915/i915_reg.h:1111: +#define MBUS_DBOX_B2B_TRANSACTIONS_MAX(x) REG_FIELD_PREP(MBUS_DBOX_B2B_TRANSACTIONS_MAX_MASK, x) -:76: WARNING:LONG_LINE: line length of 104 exceeds 100 columns #76: FILE: drivers/gpu/drm/i915/i915_reg.h:1113: +#define MBUS_DBOX_B2B_TRANSACTIONS_DELAY(x) REG_FIELD_PREP(MBUS_DBOX_B2B_TRANSACTIONS_DELAY_MASK, x) total: 0 errors, 2 warnings, 0 checks, 55 lines checked 3b609035e3bc drm/i915/display/adlp: Adjust MBUS DBOX BW and B credits d26e768a064e drm/i915/display: Add HAS_MBUS_JOINING 34348e3c5a7f drm/i915/display/adlp: Fix programing of PIPE_MBUS_DBOX_CTL
