On Mon, Mar 28, 2022 at 12:17:16PM +0300, Jani Nikula wrote: > The reduced blanking bit is valid only for CVT, indicated by display > range limits flags 0x04. > > Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/drm_edid.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > index 1b552fe54f38..13d05062d68c 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -2408,7 +2408,7 @@ is_rb(struct detailed_timing *t, void *data) > if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE)) > return; > > - if (r[15] & 0x10) > + if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10) > *(bool *)data = true; > } > > -- > 2.30.2 -- Ville Syrjälä Intel
