✗ Fi.CI.BAT: failure for drm/i915: Start reordering modeset clock calculations

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Title: Project List - Patchwork
Patch Details
Series:drm/i915: Start reordering modeset clock calculations
URL:https://patchwork.freedesktop.org/series/101789/
State:failure
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22683/index.html

CI Bug Log - changes from CI_DRM_11405 -> Patchwork_22683

Summary

FAILURE

Serious unknown changes coming with Patchwork_22683 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22683, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22683/index.html

Participating hosts (45 -> 34)

Missing (11): fi-bdw-samus bat-dg1-6 bat-dg2-8 bat-dg2-9 fi-bsw-cyan bat-adlp-6 bat-adlp-4 bat-rpls-1 bat-rpls-2 bat-jsl-2 bat-jsl-1

Possible new issues

Here are the unknown changes that may have been introduced in Patchwork_22683:

IGT changes

Possible regressions

Warnings

Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

Known issues

Here are the changes found in Patchwork_22683 that come from known issues:

IGT changes

Issues hit

Possible fixes

Warnings

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Build changes

CI-20190529: 20190529
CI_DRM_11405: 631579c25b67cc4a6ee014440ddcac6c72b9bf50 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6393: 1d267ea1b829fa10b31a37ccf6b4a970f032784a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22683: 5d0098769f1066470c1b7cdb22c0b066ff517a34 @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

5d0098769f10 drm/i915: Reassign DPLLs only for crtcs going throug .compute_config()
4d0d47819c90 drm/i915: Clean up DPLL related debugs
f78032f898c7 drm/i915: Do .crtc_compute_clock() earlier
c64fe9a7ba0c drm/i915: Split shared dpll .get_dplls() into compute and get phases
f71777efae30 drm/i915: Add crtc .crtc_get_shared_dpll()
ca60dc3a2f8a drm/i915: Split out dg2_crtc_compute_clock()
3f11772ea836 drm/i915: Clear the dpll_hw_state when disabling a pipe
4e89276790b2 drm/i915: Move the dpll_hw_state clearing to intel_dpll_crtc_compute_clock()
2e1ac19c4047 drm/i915: Move stuff into intel_dpll_crtc_compute_clock()
4a49b686c648 drm/i915: Adjust .crtc_compute_clock() calling convention
33ae484eb053 drm/i915: Remove pointless dpll_funcs checks
1b2d4a4a599e drm/i915: Pass dev_priv to intel_shared_dpll_init()
3b931b51817a drm/i915: Make .get_dplls() return int


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