On Tue, 25 Jun 2013 19:21:04 +0300
ville.syrjala at linux.intel.com wrote:
> From: Ville Syrj?l? <ville.syrjala at linux.intel.com>
>
> The timeout is 10 ms so it would end up as one jiffy when HZ=100, and
> one jiffy is quite susceptible to spurious timeouts as we've seen
> recently.
>
> Signed-off-by: Ville Syrj?l? <ville.syrjala at linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 6b98d45..8b7475e 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3073,7 +3073,7 @@ void gen6_set_rps(struct drm_device *dev, u8 val)
> */
> static void vlv_update_rps_cur_delay(struct drm_i915_private *dev_priv)
> {
> - unsigned long timeout = jiffies + msecs_to_jiffies(10);
> + unsigned long timeout = jiffies + msecs_to_jiffies_timeout(10);
> u32 pval;
>
> WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
