On Fri, 11 Mar 2022, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> When we found a downclock mode dev_priv->drrs.type is just a
> straight copy of dev_priv->vbt.drrs_type. And in case we
> couldn't find a downclock mode can_enable_drrs() won't let
> us enable DRRS anyway so the minor distinction between the
> two is irrelevant. So let's just nuke dev_priv->drrs.type
> and consult the VBT version directly.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 +-
> drivers/gpu/drm/i915/display/intel_drrs.c | 10 ++++------
> drivers/gpu/drm/i915/i915_drv.h | 1 -
> 3 files changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index e511500ee26a..2a6fd15b1471 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -1156,7 +1156,7 @@ static void drrs_status_per_crtc(struct seq_file *m,
> seq_printf(m, "%s:\n", connector->name);
>
> if (connector->connector_type == DRM_MODE_CONNECTOR_eDP &&
> - drrs->type == DRRS_TYPE_SEAMLESS)
> + dev_priv->vbt.drrs_type == DRRS_TYPE_SEAMLESS)
> supported = true;
>
> seq_printf(m, "\tDRRS Supported: %s\n", str_yes_no(supported));
> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
> index c97b5dee8cae..4afbc903f169 100644
> --- a/drivers/gpu/drm/i915/display/intel_drrs.c
> +++ b/drivers/gpu/drm/i915/display/intel_drrs.c
> @@ -65,7 +65,7 @@ static bool can_enable_drrs(struct intel_connector *connector,
> return false;
>
> return connector->panel.downclock_mode &&
> - i915->drrs.type == DRRS_TYPE_SEAMLESS;
> + i915->vbt.drrs_type == DRRS_TYPE_SEAMLESS;
> }
>
> void
> @@ -154,7 +154,7 @@ static void intel_drrs_set_state(struct drm_i915_private *dev_priv,
> return;
> }
>
> - if (dev_priv->drrs.type != DRRS_TYPE_SEAMLESS) {
> + if (dev_priv->vbt.drrs_type != DRRS_TYPE_SEAMLESS) {
> drm_dbg_kms(&dev_priv->drm, "Only Seamless DRRS supported.\n");
> return;
> }
> @@ -269,7 +269,7 @@ intel_drrs_update(struct intel_dp *intel_dp,
> {
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>
> - if (dev_priv->drrs.type != DRRS_TYPE_SEAMLESS)
> + if (dev_priv->vbt.drrs_type != DRRS_TYPE_SEAMLESS)
> return;
>
> mutex_lock(&dev_priv->drrs.mutex);
> @@ -325,7 +325,7 @@ static void intel_drrs_frontbuffer_update(struct drm_i915_private *dev_priv,
> struct drm_crtc *crtc;
> enum pipe pipe;
>
> - if (dev_priv->drrs.type != DRRS_TYPE_SEAMLESS)
> + if (dev_priv->vbt.drrs_type != DRRS_TYPE_SEAMLESS)
> return;
>
> cancel_delayed_work(&dev_priv->drrs.work);
> @@ -460,8 +460,6 @@ intel_drrs_init(struct intel_connector *connector,
> return NULL;
> }
>
> - dev_priv->drrs.type = dev_priv->vbt.drrs_type;
> -
> dev_priv->drrs.refresh_rate = DRRS_REFRESH_RATE_HIGH;
> drm_dbg_kms(&dev_priv->drm,
> "[CONNECTOR:%d:%s] seamless DRRS supported\n",
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7d622d1afe93..6a59fc2cb9c2 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -213,7 +213,6 @@ struct i915_drrs {
> struct intel_dp *dp;
> unsigned busy_frontbuffer_bits;
> enum drrs_refresh_rate refresh_rate;
> - enum drrs_type type;
> };
>
> #define QUIRK_LVDS_SSC_DISABLE (1<<1)
--
Jani Nikula, Intel Open Source Graphics Center
