✗ Fi.CI.BAT: failure for drm/i915: Clean up some dpll stuff (rev4)

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Title: Project List - Patchwork
Patch Details
Series:drm/i915: Clean up some dpll stuff (rev4)
URL:https://patchwork.freedesktop.org/series/100899/
State:failure
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22519/index.html

CI Bug Log - changes from CI_DRM_11338 -> Patchwork_22519

Summary

FAILURE

Serious unknown changes coming with Patchwork_22519 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22519, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22519/index.html

Participating hosts (46 -> 42)

Additional (1): bat-dg1-6
Missing (5): shard-tglu fi-tgl-1115g4 fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510

Possible new issues

Here are the unknown changes that may have been introduced in Patchwork_22519:

IGT changes

Possible regressions

Known issues

Here are the changes found in Patchwork_22519 that come from known issues:

IGT changes

Issues hit

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Build changes

CI-20190529: 20190529
CI_DRM_11338: 10d23ef3d24468332f37689a99d707e57c4d9a3f @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6368: 60e5ffca027b38398c279fba0f5a1b7517aa6061 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22519: 9e960edd06e426a2db60d571bd68bb934d605f4c @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

9e960edd06e4 drm/i915: Remove struct dp_link_dpll
e34846f1debb drm/i915: Populate bxt/glk DPLL clock limits a bit more
ae76f1c7d194 drm/i915: Replace hand rolled bxt vco calculation with chv_calc_dpll_params()
260df2db4bd6 drm/i915: Replace bxt_clk_div with struct dpll
82e532601527 drm/i915: Store the m2 divider as a whole in bxt_clk_div
0281dfc0ba74 drm/i915: Clean up bxt/glk PLL registers
a5a66d2c79c9 drm/i915: Remove redundant/wrong comments
b3b645163a09 drm/i915: Store the /5 target clock in struct dpll on vlv/chv


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