== Series Details == Series: drm/i915: Fix bandwith related cdclk calculations (rev2) URL : https://patchwork.freedesktop.org/series/98975/ State : warning == Summary == $ dim checkpatch origin/drm-tip c60dc5b8150b drm/i915: Tweak plane ddb allocation tracking f73e140093bf drm/i915: Split plane data_rate into data_rate+data_rate_y bf50385f5dac drm/i915: Pre-calculate plane relative data rate -:399: WARNING:LONG_LINE: line length of 102 exceeds 100 columns #399: FILE: drivers/gpu/drm/i915/intel_pm.c:5154: + iter.start + iter.uv_total[plane_id]); total: 0 errors, 1 warnings, 0 checks, 352 lines checked 3d55cf48c60c drm/i915: Remove total[] and uv_total[] from ddb allocation a20ee8c5b4c8 drm/i915: Nuke intel_bw_calc_min_cdclk() fd80e1100608 drm/i915: Round up when calculating display bandwidth requirements 600f71268f91 drm/i915: Properly write lock bw_state when it changes bf90a2f0ae6e drm/i915: Fix DBUF bandwidth vs. cdclk handling 9ce73d6df0c4 drm/i915: Add "maximum pipe read bandwidth" checks
