On Wed, Feb 16, 2022 at 07:42:50PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Extract the data rate calculation loop out from
> intel_bw_atomic_check() to make it a bit less confusing.
>
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_bw.c | 63 +++++++++++++++----------
> 1 file changed, 37 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index fa03f0935b6d..963b99d3557c 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -835,31 +835,12 @@ static u16 icl_qgv_points_mask(struct drm_i915_private *i915)
> return mask;
> }
>
> -int intel_bw_atomic_check(struct intel_atomic_state *state)
> +static int intel_bw_check_data_rate(struct intel_atomic_state *state)
> {
> - struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> - struct intel_crtc_state *new_crtc_state, *old_crtc_state;
> - struct intel_bw_state *new_bw_state = NULL;
> - const struct intel_bw_state *old_bw_state = NULL;
> - unsigned int data_rate;
> - unsigned int num_active_planes;
> + struct drm_i915_private *i915 = to_i915(state->base.dev);
> + const struct intel_crtc_state *new_crtc_state, *old_crtc_state;
> struct intel_crtc *crtc;
> - int i, ret;
> - u32 allowed_points = 0;
> - unsigned int max_bw_point = 0, max_bw = 0;
> - unsigned int num_qgv_points = dev_priv->max_bw[0].num_qgv_points;
> - unsigned int num_psf_gv_points = dev_priv->max_bw[0].num_psf_gv_points;
> -
> - /* FIXME earlier gens need some checks too */
> - if (DISPLAY_VER(dev_priv) < 11)
> - return 0;
> -
> - /*
> - * If we already have the bw state then recompute everything
> - * even if pipe data_rate / active_planes didn't change.
> - * Other things (such as SAGV) may have changed.
> - */
> - new_bw_state = intel_atomic_get_new_bw_state(state);
> + int i;
>
> for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> new_crtc_state, i) {
> @@ -871,6 +852,7 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)
> intel_bw_crtc_num_active_planes(old_crtc_state);
> unsigned int new_active_planes =
> intel_bw_crtc_num_active_planes(new_crtc_state);
> + struct intel_bw_state *new_bw_state;
>
> /*
> * Avoid locking the bw state when
> @@ -887,13 +869,42 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)
> new_bw_state->data_rate[crtc->pipe] = new_data_rate;
> new_bw_state->num_active_planes[crtc->pipe] = new_active_planes;
>
> - drm_dbg_kms(&dev_priv->drm,
> - "pipe %c data rate %u num active planes %u\n",
> - pipe_name(crtc->pipe),
> + drm_dbg_kms(&i915->drm,
> + "[CRTC:%d:%s] data rate %u num active planes %u\n",
> + crtc->base.base.id, crtc->base.name,
> new_bw_state->data_rate[crtc->pipe],
> new_bw_state->num_active_planes[crtc->pipe]);
> }
>
> + return 0;
> +}
> +
> +int intel_bw_atomic_check(struct intel_atomic_state *state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> + const struct intel_bw_state *old_bw_state;
> + struct intel_bw_state *new_bw_state;
> + unsigned int data_rate;
> + unsigned int num_active_planes;
> + int i, ret;
> + u32 allowed_points = 0;
> + unsigned int max_bw_point = 0, max_bw = 0;
> + unsigned int num_qgv_points = dev_priv->max_bw[0].num_qgv_points;
> + unsigned int num_psf_gv_points = dev_priv->max_bw[0].num_psf_gv_points;
> +
> + /* FIXME earlier gens need some checks too */
> + if (DISPLAY_VER(dev_priv) < 11)
> + return 0;
> +
> + ret = intel_bw_check_data_rate(state);
> + if (ret)
> + return ret;
> +
> + /*
> + * If we don't have a bw_state by now then none of the
> + * inputs to the QGV mask computation may have changed.
> + */
> + new_bw_state = intel_atomic_get_new_bw_state(state);
> if (!new_bw_state)
> return 0;
>
> --
> 2.34.1
>
