On Thu, Feb 10, 2022 at 04:13:42PM -0800, clinton.a.taylor@xxxxxxxxx wrote:
> From: Clint Taylor <clinton.a.taylor@xxxxxxxxx>
>
> BSPEC: 46123
> v2: Address review feedback [MattR]
> Cc: Matt Roper <matthew.d.roper@xxxxxxxxx>
> Signed-off-by: Clint Taylor <clinton.a.taylor@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +++++
> drivers/gpu/drm/i915/i915_reg.h | 2 ++
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index b146a393cd79..c6b78529d149 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -689,6 +689,11 @@ static void dg2_ctx_workarounds_init(struct intel_engine_cs *engine,
> IS_DG2_GRAPHICS_STEP(engine->i915, G11, STEP_A0, STEP_B0))
> wa_masked_en(wal, GEN9_HALF_SLICE_CHICKEN7,
> DG2_DISABLE_ROUND_ENABLE_ALLOW_FOR_SSLA);
> +
> + /* wa_14014947963: DG2 G10 [B0..NONE] G11 [ALL] */
> + if (IS_DG2_GRAPHICS_STEP(engine->i915, G10, STEP_B0, STEP_FOREVER) ||
> + IS_DG2_G11(engine->i915))
It looks like this workaround also applies to DG2-G12 (all steppings),
so we'll need an "|| IS_DG2_G12(engine->i915)" added to the condition
here.
> + wa_masked_field_set(wal, VF_PREEMPTION, PREEMPTION_VERTEX_COUNT, 0x4000);
> }
>
> static void fakewa_disable_nestedbb_mode(struct intel_engine_cs *engine,
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 87c92314ee26..bfbeebe57725 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9928,4 +9928,6 @@ enum skl_power_gate {
> #define CLKGATE_DIS_MISC _MMIO(0x46534)
> #define CLKGATE_DIS_MISC_DMASC_GATING_DIS REG_BIT(21)
>
> +#define VF_PREEMPTION _MMIO(0x83a4)
> +#define PREEMPTION_VERTEX_COUNT REG_GENMASK(15, 0)
This should go in drivers/gpu/drm/i915/gt/intel_gt_regs.h now that we've
started splitting up the register file.
Matt
> #endif /* _I915_REG_H_ */
> --
> 2.34.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
