> -----Original Message-----
> From: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>
> Sent: Thursday, February 10, 2022 12:31 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Kahola, Mika <mika.kahola@xxxxxxxxx>
> Subject: [PATCH] drm/i915/fbc: Fix the plane end Y offset check
>
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> We lost the required >>16 when I refactored the FBC plane state checks. Bring it
> back so the check does what it's supposed to.
>
> Cc: Mika Kahola <mika.kahola@xxxxxxxxx>
> Fixes: 2e6c99f88679 ("drm/i915/fbc: Nuke lots of crap from
> intel_fbc_state_cache")
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Reviewed-by: Mika Kahola <mika.kahola@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index bcdffe62f3cb..87f4af3fd523 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1125,7 +1125,8 @@ static int intel_fbc_check_plane(struct
> intel_atomic_state *state,
>
> /* Wa_22010751166: icl, ehl, tgl, dg1, rkl */
> if (DISPLAY_VER(i915) >= 11 &&
> - (plane_state->view.color_plane[0].y +
> drm_rect_height(&plane_state->uapi.src)) & 3) {
> + (plane_state->view.color_plane[0].y +
> + (drm_rect_height(&plane_state->uapi.src) >> 16)) & 3) {
> plane_state->no_fbc_reason = "plane end Y offset misaligned";
> return false;
> }
> --
> 2.34.1
