Re: [PATCH 09/10] drm/i915: Return both master and slave pipes from enabled_bigjoiner_pipes()

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On Wed, Feb 09, 2022 at 12:00:26PM -0800, Navare, Manasi wrote:
> On Thu, Feb 03, 2022 at 08:38:22PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > 
> > Return both the master and slave pipe bitmasks from
> > enabled_bigjoiner_pipes(). We'll have use for both during
> > readout soon.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> 
> This looks good, can this be just combined with the patch that would use the slave and mastr pipes
> in the readout ?

I think that patch is already far too big. But I couldn't immediately
think how to split it up even more.

> 
> Either way,
> 
> Reviewed-by: Manasi Navare <manasi.d.navare@xxxxxxxxx>
> 
> Manasi
> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c | 25 +++++++++++---------
> >  1 file changed, 14 insertions(+), 11 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 6df498fc720a..34b6b4ab3a1b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -4064,11 +4064,14 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
> >  	return tmp & TRANS_DDI_FUNC_ENABLE;
> >  }
> >  
> > -static u8 enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv)
> > +static void enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv,
> > +				    u8 *master_pipes, u8 *slave_pipes)
> >  {
> > -	u8 master_pipes = 0, slave_pipes = 0;
> >  	struct intel_crtc *crtc;
> >  
> > +	*master_pipes = 0;
> > +	*slave_pipes = 0;
> > +
> >  	for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc,
> >  					 bigjoiner_pipes(dev_priv)) {
> >  		enum intel_display_power_domain power_domain;
> > @@ -4083,9 +4086,9 @@ static u8 enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv)
> >  				continue;
> >  
> >  			if (tmp & MASTER_BIG_JOINER_ENABLE)
> > -				master_pipes |= BIT(pipe);
> > +				*master_pipes |= BIT(pipe);
> >  			else
> > -				slave_pipes |= BIT(pipe);
> > +				*slave_pipes |= BIT(pipe);
> >  		}
> >  
> >  		if (DISPLAY_VER(dev_priv) < 13)
> > @@ -4096,18 +4099,16 @@ static u8 enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv)
> >  			u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe));
> >  
> >  			if (tmp & UNCOMPRESSED_JOINER_MASTER)
> > -				master_pipes |= BIT(pipe);
> > +				*master_pipes |= BIT(pipe);
> >  			if (tmp & UNCOMPRESSED_JOINER_SLAVE)
> > -				slave_pipes |= BIT(pipe);
> > +				*slave_pipes |= BIT(pipe);
> >  		}
> >  	}
> >  
> >  	/* Bigjoiner pipes should always be consecutive master and slave */
> > -	drm_WARN(&dev_priv->drm, slave_pipes != master_pipes << 1,
> > +	drm_WARN(&dev_priv->drm, *slave_pipes != *master_pipes << 1,
> >  		 "Bigjoiner misconfigured (master pipes 0x%x, slave pipes 0x%x)\n",
> > -		 master_pipes, slave_pipes);
> > -
> > -	return slave_pipes;
> > +		 *master_pipes, *slave_pipes);
> >  }
> >  
> >  static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
> > @@ -4126,6 +4127,7 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
> >  	struct drm_i915_private *dev_priv = to_i915(dev);
> >  	u8 panel_transcoder_mask = hsw_panel_transcoders(dev_priv);
> >  	enum transcoder cpu_transcoder;
> > +	u8 master_pipes, slave_pipes;
> >  	u8 enabled_transcoders = 0;
> >  
> >  	/*
> > @@ -4177,7 +4179,8 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
> >  		enabled_transcoders |= BIT(cpu_transcoder);
> >  
> >  	/* bigjoiner slave -> consider the master pipe's transcoder as well */
> > -	if (enabled_bigjoiner_pipes(dev_priv) & BIT(crtc->pipe)) {
> > +	enabled_bigjoiner_pipes(dev_priv, &master_pipes, &slave_pipes);
> > +	if (slave_pipes & BIT(crtc->pipe)) {
> >  		cpu_transcoder = (enum transcoder) crtc->pipe - 1;
> >  		if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
> >  			enabled_transcoders |= BIT(cpu_transcoder);
> > -- 
> > 2.34.1
> > 

-- 
Ville Syrjälä
Intel



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