On Wed, 09 Feb 2022, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Pull the IPS state readout into hsw_ips.c.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/hsw_ips.c | 20 ++++++++++++++++++++
> drivers/gpu/drm/i915/display/hsw_ips.h | 1 +
> drivers/gpu/drm/i915/display/intel_display.c | 14 +-------------
> 3 files changed, 22 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c
> index fb34ef615025..38014e0cc9ad 100644
> --- a/drivers/gpu/drm/i915/display/hsw_ips.c
> +++ b/drivers/gpu/drm/i915/display/hsw_ips.c
> @@ -249,3 +249,23 @@ int hsw_ips_compute_config(struct intel_atomic_state *state,
>
> return 0;
> }
> +
> +void hsw_ips_get_config(struct intel_crtc_state *crtc_state)
> +{
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> +
> + if (!hsw_crtc_supports_ips(crtc))
> + return;
> +
> + if (IS_HASWELL(i915)) {
> + crtc_state->ips_enabled = intel_de_read(i915, IPS_CTL) & IPS_ENABLE;
> + } else {
> + /*
> + * We cannot readout IPS state on broadwell, set to
> + * true so we can set it to a defined state on first
> + * commit.
> + */
> + crtc_state->ips_enabled = true;
> + }
> +}
> diff --git a/drivers/gpu/drm/i915/display/hsw_ips.h b/drivers/gpu/drm/i915/display/hsw_ips.h
> index d63bdef5100a..4564dee497d7 100644
> --- a/drivers/gpu/drm/i915/display/hsw_ips.h
> +++ b/drivers/gpu/drm/i915/display/hsw_ips.h
> @@ -21,5 +21,6 @@ bool hsw_crtc_supports_ips(struct intel_crtc *crtc);
> bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state);
> int hsw_ips_compute_config(struct intel_atomic_state *state,
> struct intel_crtc *crtc);
> +void hsw_ips_get_config(struct intel_crtc_state *crtc_state);
>
> #endif /* __HSW_IPS_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 134527981e2b..cdfee4ba1166 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4191,19 +4191,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
> ilk_get_pfit_config(pipe_config);
> }
>
> - if (hsw_crtc_supports_ips(crtc)) {
> - if (IS_HASWELL(dev_priv))
> - pipe_config->ips_enabled = intel_de_read(dev_priv,
> - IPS_CTL) & IPS_ENABLE;
> - else {
> - /*
> - * We cannot readout IPS state on broadwell, set to
> - * true so we can set it to a defined state on first
> - * commit.
> - */
> - pipe_config->ips_enabled = true;
> - }
> - }
> + hsw_ips_get_config(pipe_config);
>
> if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
> !transcoder_is_dsi(pipe_config->cpu_transcoder)) {
--
Jani Nikula, Intel Open Source Graphics Center
