✓ Fi.CI.BAT: success for More GT register cleanup

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Title: Project List - Patchwork
Patch Details
Series:More GT register cleanup
URL:https://patchwork.freedesktop.org/series/99872/
State:success
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22217/index.html

CI Bug Log - changes from CI_DRM_11205 -> Patchwork_22217

Summary

SUCCESS

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22217/index.html

Participating hosts (46 -> 42)

Missing (4): fi-bsw-cyan fi-icl-u2 shard-tglu fi-pnv-d510

Known issues

Here are the changes found in Patchwork_22217 that come from known issues:

IGT changes

Issues hit

Possible fixes

Warnings

Build changes

CI-20190529: 20190529
CI_DRM_11205: 9999c764a7571bebed03bec481d6fffcb23144fe @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6341: a96674e747ea2f2431bbf8813156adc44ec3162a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22217: 1048c366fb86f43e4eccc2064225902eaf1ada36 @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

1048c366fb86 drm/i915/gt: Order GT registers by MMIO offset
e69f259c44a8 drm/i915/gt: Use consistent offset notation in intel_gt_regs.h
da6b61418421 drm/i915/gt: Cleanup spacing of intel_gt_regs.h
c2ad90281821 drm/i915/gt: Use parameterized RING_MI_MODE
827feabcfa0f drm/i915/gt: Move SFC lock bits to intel_engine_regs.h
9a3768557554 drm/i915/gt: Drop duplicate register definition for VDBOX_CGCTL3F18


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