From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Rehashed version of the M/N cleanup after Jani (rightly)
complained about the legibility of some of the patches in
the v1 series. These are chunked to a finer pulp, some got
revised a bit, and I left out a few of the FDI related
things for now. I'll revisit the PCH port/FDI topic later,
for now I just slapped in an extra patch to make sure we
don't try to use DRRS on PCH ports.
Ville Syrjälä (17):
drm/i915: Nuke intel_dp_set_m_n()
drm/i915: Nuke intel_dp_get_m_n()
drm/i915: Nuke ilk_get_fdi_m_n_config()
drm/i915: Split intel_cpu_transcoder_set_m_n() into M1/N1 vs. M2/N2
variants
drm/i915: Split intel_cpu_transcoder_get_m_n() into M1/N1 vs. M2/N2
variants
drm/i915: Pass crtc+cpu_transcoder to intel_cpu_transcoder_set_m_n()
drm/i915: Move PCH transcoder M/N setup into the PCH code
drm/i915: Move M/N setup to a more logical place on ddi platforms
drm/i915: Extract {i9xx,ilk}_configure_cpu_transcoder()
drm/i915: Disable DRRS on IVB/HSW port != A
drm/i915: Extract can_enable_drrs()
drm/i915: Fix intel_cpu_transcoder_has_m2_n2()
drm/i915: Clear DP M2/N2 when not doing DRRS
drm/i915: Program pch transcoder m2/n2
drm/i915: Dump dp_m2_n2 always
drm/i915: Always check dp_m2_n2 on pre-bdw
drm/i915: Document BDW+ DRRS M/N programming requirements
drivers/gpu/drm/i915/display/g4x_dp.c | 18 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 14 +-
drivers/gpu/drm/i915/display/intel_display.c | 266 ++++++++----------
drivers/gpu/drm/i915/display/intel_display.h | 32 ++-
.../drm/i915/display/intel_display_types.h | 19 --
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 -
drivers/gpu/drm/i915/display/intel_drrs.c | 50 +++-
.../gpu/drm/i915/display/intel_pch_display.c | 54 +++-
.../gpu/drm/i915/display/intel_pch_display.h | 6 +
9 files changed, 259 insertions(+), 202 deletions(-)
--
2.34.1
