✓ Fi.CI.BAT: success for Async flip optimization for DG2 (rev2)

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Title: Project List - Patchwork
Patch Details
Series:Async flip optimization for DG2 (rev2)
URL:https://patchwork.freedesktop.org/series/98981/
State:success
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22015/index.html

CI Bug Log - changes from CI_DRM_11094 -> Patchwork_22015

Summary

SUCCESS

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22015/index.html

Participating hosts (46 -> 41)

Missing (5): shard-tglu fi-bsw-cyan shard-rkl shard-dg1 fi-bdw-samus

Known issues

Here are the changes found in Patchwork_22015 that come from known issues:

IGT changes

Issues hit

Possible fixes

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Build changes

CI-20190529: 20190529
CI_DRM_11094: 6ce31c986ee8beaa0f98fd4e200b7a421fd4adf9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6327: 0d559158c2d3b5723abbfc2cb4b04532e28663b2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22015: 52ba575ac8c774a47867e57a16c9f7cd08a969b2 @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

52ba575ac8c7 drm/i915: Don't allocate extra ddb during async flip for DG2
288d6ef2c274 drm/i915: Use wm0 only during async flips for DG2
69a7c958433d drm/i915: Introduce do_async_flip flag to intel_plane_state
af673ae37d0c drm/i915: Pass plane to watermark calculation functions


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