On Fri, 07 Jan 2022, Matt Roper <matthew.d.roper@xxxxxxxxx> wrote: > On Fri, Jan 07, 2022 at 11:49:49AM +0200, Jani Nikula wrote: >> The PCI config space registers don't really belong next to the MMIO >> register definitions. >> >> Cc: Matt Roper <matthew.d.roper@xxxxxxxxx> >> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> >> --- > ... >> diff --git a/drivers/gpu/drm/i915/intel_pci_config.h b/drivers/gpu/drm/i915/intel_pci_config.h >> new file mode 100644 >> index 000000000000..db35b91d36e0 >> --- /dev/null >> +++ b/drivers/gpu/drm/i915/intel_pci_config.h >> @@ -0,0 +1,85 @@ >> +/* SPDX-License-Identifier: MIT */ >> +/* >> + * Copyright © 2021 Intel Corporation > > It's 2022 now! They were written in 2021, but I guess it's the first posting that matters. Fixed in v2. > > Otherwise, > > Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx> Thanks! BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center
