On Wed, Dec 15, 2021 at 03:56:18PM +0200, Alexander Usyskin wrote: > From: Tomas Winkler <tomas.winkler@xxxxxxxxx> > > GSC is a graphics system controller, based on CSE, it provides > a chassis controller for graphics discrete cards, as well as it > supports media protection (HDCP 2.2) on selected devices. > > There are two MEI interfaces in GSC HECI1, the one that provides media > protection and HECI2 the one that provides firmware interface. > > Both interfaces are on the BAR0 at offsets 0x00258000 and 0x00259000. > GSC is a GT Engine (class 4: instance 6). HECI1 interrupt is signaled > via bit 15 and HECI2 via bit 14 in the interrupt register. > > This patch exports GSC as platform device for mei driver to bind to. This is NOT a platform device. It is part of a PCI device, which is NOT a platform device. I keep having to say this. Please use the auxbus interface instead if you want to split a PCI device up into sub-child-devices and bind drivers to them. That is what it was created for, and this SHOULD have been caught by the other Intel reviewers who signed-off on this patch. so no, I will not ack this, it is not ok at all, sorry. greg k-h
