On Thu, Dec 09, 2021 at 06:51:22PM +0200, Jani Nikula wrote:
> Rename to intel_cdclk_atomic_check() and make
> intel_cdclk_bw_calc_min_cdclk() static.
>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 55 +++++++++++++++++++-
> drivers/gpu/drm/i915/display/intel_cdclk.h | 3 +-
> drivers/gpu/drm/i915/display/intel_display.c | 55 +-------------------
> 3 files changed, 57 insertions(+), 56 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 639a64733f61..a216a350006d 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -24,6 +24,7 @@
> #include <linux/time.h>
>
> #include "intel_atomic.h"
> +#include "intel_atomic_plane.h"
> #include "intel_audio.h"
> #include "intel_bw.h"
> #include "intel_cdclk.h"
> @@ -68,7 +69,7 @@ void intel_cdclk_get_cdclk(struct drm_i915_private *dev_priv,
> dev_priv->cdclk_funcs->get_cdclk(dev_priv, cdclk_config);
> }
>
> -int intel_cdclk_bw_calc_min_cdclk(struct intel_atomic_state *state)
> +static int intel_cdclk_bw_calc_min_cdclk(struct intel_atomic_state *state)
> {
> struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> return dev_priv->cdclk_funcs->bw_calc_min_cdclk(state);
> @@ -2629,6 +2630,58 @@ intel_atomic_get_cdclk_state(struct intel_atomic_state *state)
> return to_intel_cdclk_state(cdclk_state);
> }
>
> +int intel_cdclk_atomic_check(struct intel_atomic_state *state,
> + bool *need_cdclk_calc)
> +{
> + struct drm_i915_private *i915 = to_i915(state->base.dev);
> + const struct intel_cdclk_state *old_cdclk_state;
> + const struct intel_cdclk_state *new_cdclk_state;
> + struct intel_plane_state *plane_state;
> + struct intel_bw_state *new_bw_state;
> + struct intel_plane *plane;
> + int min_cdclk = 0;
> + enum pipe pipe;
> + int ret;
> + int i;
> +
> + /*
> + * active_planes bitmask has been updated, and potentially affected
> + * planes are part of the state. We can now compute the minimum cdclk
> + * for each plane.
> + */
> + for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
> + ret = intel_plane_calc_min_cdclk(state, plane, need_cdclk_calc);
> + if (ret)
> + return ret;
> + }
> +
> + old_cdclk_state = intel_atomic_get_old_cdclk_state(state);
> + new_cdclk_state = intel_atomic_get_new_cdclk_state(state);
> +
> + if (new_cdclk_state &&
> + old_cdclk_state->force_min_cdclk != new_cdclk_state->force_min_cdclk)
> + *need_cdclk_calc = true;
> +
> + ret = intel_cdclk_bw_calc_min_cdclk(state);
> + if (ret)
> + return ret;
> +
> + new_bw_state = intel_atomic_get_new_bw_state(state);
> +
> + if (!new_cdclk_state || !new_bw_state)
> + return 0;
> +
> + for_each_pipe(i915, pipe) {
> + min_cdclk = max(new_cdclk_state->min_cdclk[pipe], min_cdclk);
> +
> + /* Currently do this change only if we need to increase */
> + if (new_bw_state->min_cdclk > min_cdclk)
> + *need_cdclk_calc = true;
> + }
> +
> + return 0;
> +}
> +
> int intel_cdclk_init(struct drm_i915_private *dev_priv)
> {
> struct intel_cdclk_state *cdclk_state;
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
> index 89ca59c46102..bb3a778c506b 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
> @@ -71,7 +71,8 @@ void intel_dump_cdclk_config(const struct intel_cdclk_config *cdclk_config,
> int intel_modeset_calc_cdclk(struct intel_atomic_state *state);
> void intel_cdclk_get_cdclk(struct drm_i915_private *dev_priv,
> struct intel_cdclk_config *cdclk_config);
> -int intel_cdclk_bw_calc_min_cdclk(struct intel_atomic_state *state);
> +int intel_cdclk_atomic_check(struct intel_atomic_state *state,
> + bool *need_cdclk_calc);
> struct intel_cdclk_state *
> intel_atomic_get_cdclk_state(struct intel_atomic_state *state);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 576196ff7da1..578f50bd6ab7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7554,59 +7554,6 @@ static int intel_atomic_check_planes(struct intel_atomic_state *state)
> return 0;
> }
>
> -static int intel_atomic_check_cdclk(struct intel_atomic_state *state,
> - bool *need_cdclk_calc)
> -{
> - struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> - const struct intel_cdclk_state *old_cdclk_state;
> - const struct intel_cdclk_state *new_cdclk_state;
> - struct intel_plane_state *plane_state;
> - struct intel_bw_state *new_bw_state;
> - struct intel_plane *plane;
> - int min_cdclk = 0;
> - enum pipe pipe;
> - int ret;
> - int i;
> - /*
> - * active_planes bitmask has been updated, and potentially
> - * affected planes are part of the state. We can now
> - * compute the minimum cdclk for each plane.
> - */
> - for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
> - ret = intel_plane_calc_min_cdclk(state, plane, need_cdclk_calc);
> - if (ret)
> - return ret;
> - }
> -
> - old_cdclk_state = intel_atomic_get_old_cdclk_state(state);
> - new_cdclk_state = intel_atomic_get_new_cdclk_state(state);
> -
> - if (new_cdclk_state &&
> - old_cdclk_state->force_min_cdclk != new_cdclk_state->force_min_cdclk)
> - *need_cdclk_calc = true;
> -
> - ret = intel_cdclk_bw_calc_min_cdclk(state);
> - if (ret)
> - return ret;
> -
> - new_bw_state = intel_atomic_get_new_bw_state(state);
> -
> - if (!new_cdclk_state || !new_bw_state)
> - return 0;
> -
> - for_each_pipe(dev_priv, pipe) {
> - min_cdclk = max(new_cdclk_state->min_cdclk[pipe], min_cdclk);
> -
> - /*
> - * Currently do this change only if we need to increase
> - */
> - if (new_bw_state->min_cdclk > min_cdclk)
> - *need_cdclk_calc = true;
> - }
> -
> - return 0;
> -}
> -
> static int intel_atomic_check_crtcs(struct intel_atomic_state *state)
> {
> struct intel_crtc_state *crtc_state;
> @@ -8055,7 +8002,7 @@ static int intel_atomic_check(struct drm_device *dev,
> if (ret)
> goto fail;
>
> - ret = intel_atomic_check_cdclk(state, &any_ms);
> + ret = intel_cdclk_atomic_check(state, &any_ms);
> if (ret)
> goto fail;
>
> --
> 2.30.2
--
Ville Syrjälä
Intel
