On Fri, Dec 03, 2021 at 12:00:42PM +0200, Ville Syrjälä wrote:
> On Fri, Dec 03, 2021 at 11:40:40AM +0200, Stanislav Lisovskiy wrote:
> > This optimization allows to achieve higher perfomance
> > during async flips.
> > For the first async flip we have to still temporarily
> > switch to sync flip, in order to reprogram plane
> > watermarks, so this requires taking into account
> > old plane state's do_async_flip flag.
> >
> > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 13 ++++++++++++-
> > drivers/gpu/drm/i915/intel_pm.c | 5 ++++-
> > 2 files changed, 16 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index b8fe40050463..872bbb965992 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -5439,6 +5439,16 @@ static bool needs_scaling(const struct intel_plane_state *state)
> > return (src_w != dst_w || src_h != dst_h);
> > }
> >
> > +static bool needs_async_flip_wm_override(struct intel_plane *plane,
> > + const struct intel_plane_state *new_plane_state,
> > + const struct intel_plane_state *old_plane_state)
> > +{
> > + struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> > +
> > + return (DISPLAY_VER(dev_priv) >= 13) && !old_plane_state->do_async_flip &&
> > + new_plane_state->do_async_flip;
> > +}
> > +
> > int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_state,
> > struct intel_crtc_state *new_crtc_state,
> > const struct intel_plane_state *old_plane_state,
> > @@ -5558,7 +5568,8 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat
> > needs_scaling(new_plane_state))))
> > new_crtc_state->disable_lp_wm = true;
> >
> > - if (new_crtc_state->uapi.async_flip && plane->async_flip)
> > + if (new_crtc_state->uapi.async_flip && new_plane_state->do_async_flip &&
> > + !needs_async_flip_wm_override(plane, new_plane_state, old_plane_state))
> > new_plane_state->do_async_flip = true;
>
> That code looks super confused.
Oh.. thanks for spotting new_plane_state->do_async_flip is redundant here.
The logic is such that if old_plane_state didn't have do_async_flip flag set,
but the new_plane_state has, it means we do first async flip here, thus
it requires temporary switching to sync flip as we discussed.
So I actually meant something like this here:
> > + if (new_crtc_state->uapi.async_flip && !needs_async_flip_wm_override(plane,
new_plane_state, old_plane_state))
>
> >
> > return 0;
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index c5c1b6bef9a2..0b45d1d61d0f 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -5542,8 +5542,11 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
> > uint_fixed_16_16_t method1, method2;
> > uint_fixed_16_16_t selected_result;
> > u32 blocks, lines, min_ddb_alloc = 0;
> > + bool dg2_async_flip_optimization = (DISPLAY_VER(dev_priv) >= 13) &&
> > + crtc_state->uapi.async_flip &&
> > + plane_id != PLANE_CURSOR;
>
> Function please. Hmm. And rather than checking the plane_id we should
> probably just check plane->async_flip since we don't want to minimize
> the watermarks for any other plane than the one doing the async flips.
Function sounds like good idea.
Stan
>
> >
> > - if (latency == 0) {
> > + if (latency == 0 || (dg2_async_flip_optimization && (level > 0))) {
> > /* reject it */
> > result->min_ddb_alloc = U16_MAX;
> > return;
> > --
> > 2.24.1.485.gad05a3d8e5
>
> --
> Ville Syrjälä
> Intel
