On Fri, May 31, 2013 at 09:12:19AM +0200, Daniel Vetter wrote: > This has accidentally been reintroduced with > > commit 22aae764a3fa21ee502b99e8986cb4e49ec14cfe > Author: Ben Widawsky <ben at bwidawsk.net> > Date: Tue May 28 19:22:24 2013 -0700 > > drm/i915: Create a more generic pm handler for hsw+ > > See > > commit 58bf8062d0b293b8e1028e5b0342082002886bd4 > Author: Daniel Vetter <daniel.vetter at ffwll.ch> > Date: Thu Jun 21 14:55:22 2012 +0200 > > drm/i915: rip out the PM_IIR WARN > > for the extensive reasoning why the WARN is bogus. > > Cc: Damien Lespiau <damien.lespiau at intel.com> > Cc: Ben Widawsky <ben at bwidawsk.net> > Cc: Chris Wilson <chris at chris-wilson.co.uk> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65197 > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch> > --- > drivers/gpu/drm/i915/i915_irq.c | 7 ++----- > 1 file changed, 2 insertions(+), 5 deletions(-) Reviewed-by: Damien Lespiau <damien.lespiau at intel.com> There's a conflict with the rest of the VECS series, but fortunately seems like an easy one. -- Damien > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index da5c9ab..df85abc 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -934,11 +934,8 @@ static void hsw_pm_irq_handler(struct drm_i915_private *dev_priv, > > spin_lock_irqsave(&dev_priv->rps.lock, flags); > dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_DEFERRED_EVENTS; > - if (dev_priv->rps.pm_iir) { > - I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir); > - /* never want to mask useful interrupts. (also posting read) */ > - WARN_ON(I915_READ_NOTRACE(GEN6_PMIMR) & ~GEN6_PM_DEFERRED_EVENTS); > - } > + I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir); > + POSTING_READ(GEN6_PMIMR); > spin_unlock_irqrestore(&dev_priv->rps.lock, flags); > > queue_work(dev_priv->wq, &dev_priv->rps.work); > -- > 1.7.10.4 >
