> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Ville
> Syrjala
> Sent: Wednesday, November 24, 2021 1:37 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: [PATCH 10/20] drm/i915/fbc: Pass i915 instead of FBC
> instance to FBC underrun stuff
>
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> The underrun code doesn't need to know any details about FBC, so just pass in
> the whole device rather than a specific FBC instance.
> We could make this a bit more fine grained by also passing in the pipe to
> intel_fbc_handle_fifo_underrun_irq() and letting the FBC code figure which FBC
> instance (if any) is active on said pipe.
> But that seems a bit overkill for this so don't bother.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Reviewed-by: Mika Kahola <mika.kahola@xxxxxxxxx>
> ---
> .../drm/i915/display/intel_display_debugfs.c | 4 +---
> drivers/gpu/drm/i915/display/intel_fbc.c | 24 +++++++++----------
> drivers/gpu/drm/i915/display/intel_fbc.h | 4 ++--
> .../drm/i915/display/intel_fifo_underrun.c | 2 +-
> 4 files changed, 16 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index acf70ae66a29..3e456e595010 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -2044,9 +2044,7 @@ i915_fifo_underrun_reset_write(struct file *filp,
> return ret;
> }
>
> - ret = intel_fbc_reset_underrun(&dev_priv->fbc);
> - if (ret)
> - return ret;
> + intel_fbc_reset_underrun(dev_priv);
>
> return cnt;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 0bef3b948670..00c93040529e 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1547,21 +1547,21 @@ static void intel_fbc_underrun_work_fn(struct
> work_struct *work)
>
> /*
> * intel_fbc_reset_underrun - reset FBC fifo underrun status.
> - * @fbc: The FBC instance
> + * @i915: the i915 device
> *
> * See intel_fbc_handle_fifo_underrun_irq(). For automated testing we
> * want to re-enable FBC after an underrun to increase test coverage.
> */
> -int intel_fbc_reset_underrun(struct intel_fbc *fbc)
> +void intel_fbc_reset_underrun(struct drm_i915_private *i915)
> {
> - struct drm_i915_private *i915 = fbc->i915;
> - int ret;
> + struct intel_fbc *fbc = &i915->fbc;
> +
> + if (!HAS_FBC(i915))
> + return;
>
> cancel_work_sync(&fbc->underrun_work);
>
> - ret = mutex_lock_interruptible(&fbc->lock);
> - if (ret)
> - return ret;
> + mutex_lock(&fbc->lock);
>
> if (fbc->underrun_detected) {
> drm_dbg_kms(&i915->drm,
> @@ -1571,13 +1571,11 @@ int intel_fbc_reset_underrun(struct intel_fbc *fbc)
>
> fbc->underrun_detected = false;
> mutex_unlock(&fbc->lock);
> -
> - return 0;
> }
>
> /**
> * intel_fbc_handle_fifo_underrun_irq - disable FBC when we get a FIFO
> underrun
> - * @fbc: The FBC instance
> + * @i915: i915 device
> *
> * Without FBC, most underruns are harmless and don't really cause too many
> * problems, except for an annoying message on dmesg. With FBC, underruns
> can @@ -1589,9 +1587,11 @@ int intel_fbc_reset_underrun(struct intel_fbc
> *fbc)
> *
> * This function is called from the IRQ handler.
> */
> -void intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
> +void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915)
> {
> - if (!HAS_FBC(fbc->i915))
> + struct intel_fbc *fbc = &i915->fbc;
> +
> + if (!HAS_FBC(i915))
> return;
>
> /* There's no guarantee that underrun_detected won't be set to true
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h
> b/drivers/gpu/drm/i915/display/intel_fbc.h
> index 74492e05a1c9..36e9e5f93bcb 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.h
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.h
> @@ -35,8 +35,8 @@ void intel_fbc_invalidate(struct drm_i915_private
> *dev_priv,
> enum fb_op_origin origin);
> void intel_fbc_flush(struct drm_i915_private *dev_priv,
> unsigned int frontbuffer_bits, enum fb_op_origin origin); -
> void intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc); -int
> intel_fbc_reset_underrun(struct intel_fbc *fbc);
> +void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915);
> +void intel_fbc_reset_underrun(struct drm_i915_private *i915);
> int intel_fbc_set_false_color(struct intel_fbc *fbc, bool enable);
>
> #endif /* __INTEL_FBC_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> index 28d9eeb7b4f3..eb841960840d 100644
> --- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> +++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> @@ -434,7 +434,7 @@ void intel_cpu_fifo_underrun_irq_handler(struct
> drm_i915_private *dev_priv,
> drm_err(&dev_priv->drm, "CPU pipe %c FIFO
> underrun\n", pipe_name(pipe));
> }
>
> - intel_fbc_handle_fifo_underrun_irq(&dev_priv->fbc);
> + intel_fbc_handle_fifo_underrun_irq(dev_priv);
> }
>
> /**
> --
> 2.32.0
